amd/common: use ac_build_buffer_load() for emitting UBO loads

[mesa.git] / src / amd / common / ac_nir_to_llvm.h

diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h
index 791c694c78a294c44ecc7c0a7c85f312efd27022..b3ad0a09857562c5cf7145936de91583e9951d90 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.h
+++ b/src/amd/common/ac_nir_to_llvm.h
@@ -30,7 +30,7 @@
 #include "amd_family.h"
 #include "../vulkan/radv_descriptor_set.h"
 #include "ac_shader_info.h"
-#include "shader_enums.h"
+#include "compiler/shader_enums.h"
 struct ac_shader_binary;
 struct ac_shader_config;
 struct nir_shader;
@@ -52,27 +52,35 @@ struct ac_tes_variant_key {
 };
 
 struct ac_tcs_variant_key {
+       struct ac_vs_variant_key vs_key;
        unsigned primitive_mode;
        unsigned input_vertices;
+       uint32_t tes_reads_tess_factors:1;
 };
 
 struct ac_fs_variant_key {
        uint32_t col_format;
        uint32_t is_int8;
+       uint32_t is_int10;
+       uint32_t multisample : 1;
 };
 
-union ac_shader_variant_key {
-       struct ac_vs_variant_key vs;
-       struct ac_fs_variant_key fs;
-       struct ac_tes_variant_key tes;
-       struct ac_tcs_variant_key tcs;
+struct ac_shader_variant_key {
+       union {
+               struct ac_vs_variant_key vs;
+               struct ac_fs_variant_key fs;
+               struct ac_tes_variant_key tes;
+               struct ac_tcs_variant_key tcs;
+       };
+       bool has_multiview_view_index;
 };
 
 struct ac_nir_compiler_options {
        struct radv_pipeline_layout *layout;
-       union ac_shader_variant_key key;
+       struct ac_shader_variant_key key;
        bool unsafe_math;
        bool supports_spill;
+       bool clamp_shadow_reference;
        enum radeon_family family;
        enum chip_class chip_class;
 };
@@ -88,7 +96,8 @@ enum ac_ud_index {
        AC_UD_SCRATCH_RING_OFFSETS = 0,
        AC_UD_PUSH_CONSTANTS = 1,
        AC_UD_INDIRECT_DESCRIPTOR_SETS = 2,
-       AC_UD_SHADER_START = 3,
+       AC_UD_VIEW_INDEX = 3,
+       AC_UD_SHADER_START = 4,
        AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
        AC_UD_VS_BASE_VERTEX_START_INSTANCE,
        AC_UD_VS_LS_TCS_IN_LAYOUT,
@@ -97,13 +106,13 @@ enum ac_ud_index {
        AC_UD_PS_MAX_UD,
        AC_UD_CS_GRID_SIZE = AC_UD_SHADER_START,
        AC_UD_CS_MAX_UD,
-       AC_UD_GS_VS_RING_STRIDE_ENTRIES = AC_UD_SHADER_START,
+       AC_UD_GS_VS_RING_STRIDE_ENTRIES = AC_UD_VS_MAX_UD,
        AC_UD_GS_MAX_UD,
-       AC_UD_TCS_OFFCHIP_LAYOUT = AC_UD_SHADER_START,
+       AC_UD_TCS_OFFCHIP_LAYOUT = AC_UD_VS_MAX_UD,
        AC_UD_TCS_MAX_UD,
        AC_UD_TES_OFFCHIP_LAYOUT = AC_UD_SHADER_START,
        AC_UD_TES_MAX_UD,
-       AC_UD_MAX_UD = AC_UD_VS_MAX_UD,
+       AC_UD_MAX_UD = AC_UD_TCS_MAX_UD,
 };
 
 /* descriptor index into scratch ring offsets */
@@ -148,7 +157,7 @@ struct ac_shader_variant_info {
        unsigned num_input_sgprs;
        unsigned num_input_vgprs;
        bool need_indirect_descriptor_sets;
-       union {
+       struct {
                struct {
                        struct ac_vs_output_info outinfo;
                        struct ac_es_output_info es_info;
@@ -169,7 +178,6 @@ struct ac_shader_variant_info {
                        bool writes_sample_mask;
                        bool early_fragment_test;
                        bool writes_memory;
-                       bool force_persample;
                        bool prim_id_input;
                        bool layer_input;
                } fs;
@@ -183,10 +191,9 @@ struct ac_shader_variant_info {
                        unsigned invocations;
                        unsigned gsvs_vertex_size;
                        unsigned max_gsvs_emit_size;
-                       bool uses_prim_id;
+                       unsigned es_type; /* GFX9: VS or TES */
                } gs;
                struct {
-                       bool uses_prim_id;
                        unsigned tcs_vertices_out;
                        /* Which outputs are actually written */
                        uint64_t outputs_written;
@@ -202,7 +209,6 @@ struct ac_shader_variant_info {
                        enum gl_tess_spacing spacing;
                        bool ccw;
                        bool point_mode;
-                       bool uses_prim_id;
                } tes;
        };
 };
@@ -211,7 +217,8 @@ void ac_compile_nir_shader(LLVMTargetMachineRef tm,
                            struct ac_shader_binary *binary,
                            struct ac_shader_config *config,
                            struct ac_shader_variant_info *shader_info,
-                           struct nir_shader *nir,
+                           struct nir_shader *const *nir,
+                           int nir_count,
                            const struct ac_nir_compiler_options *options,
                           bool dump_shader);