radv: add an option that allows to dump pre-optimization ir

[mesa.git] / src / amd / common / ac_shader_abi.h

diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index 5f296be0c1f07c88d574dec257926a2514a27c12..3e9e7a47861941ae5736ae25d26538e29e23ac54 100644 (file)
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -42,6 +42,11 @@ struct ac_shader_abi {
        LLVMValueRef draw_id;
        LLVMValueRef vertex_id;
        LLVMValueRef instance_id;
+       LLVMValueRef tcs_patch_id;
+       LLVMValueRef tcs_rel_ids;
+       LLVMValueRef tes_patch_id;
+       LLVMValueRef gs_prim_id;
+       LLVMValueRef gs_invocation_id;
        LLVMValueRef frag_pos[4];
        LLVMValueRef front_face;
        LLVMValueRef ancillary;
@@ -58,6 +63,53 @@ struct ac_shader_abi {
                             unsigned max_outputs,
                             LLVMValueRef *addrs);
 
+       void (*emit_vertex)(struct ac_shader_abi *abi,
+                           unsigned stream,
+                           LLVMValueRef *addrs);
+
+       LLVMValueRef (*load_inputs)(struct ac_shader_abi *abi,
+                                   unsigned location,
+                                   unsigned driver_location,
+                                   unsigned component,
+                                   unsigned num_components,
+                                   unsigned vertex_index,
+                                   unsigned const_index,
+                                   LLVMTypeRef type);
+
+       LLVMValueRef (*load_tess_varyings)(struct ac_shader_abi *abi,
+                                          LLVMValueRef vertex_index,
+                                          LLVMValueRef param_index,
+                                          unsigned const_index,
+                                          unsigned location,
+                                          unsigned driver_location,
+                                          unsigned component,
+                                          unsigned num_components,
+                                          bool is_patch,
+                                          bool is_compact,
+                                          bool load_inputs);
+
+       void (*store_tcs_outputs)(struct ac_shader_abi *abi,
+                                 LLVMValueRef vertex_index,
+                                 LLVMValueRef param_index,
+                                 unsigned const_index,
+                                 unsigned location,
+                                 unsigned driver_location,
+                                 LLVMValueRef src,
+                                 unsigned component,
+                                 bool is_patch,
+                                 bool is_compact,
+                                 unsigned writemask);
+
+       LLVMValueRef (*load_tess_coord)(struct ac_shader_abi *abi,
+                                       LLVMTypeRef type,
+                                       unsigned num_components);
+
+       LLVMValueRef (*load_patch_vertices_in)(struct ac_shader_abi *abi);
+
+       LLVMValueRef (*load_tess_level)(struct ac_shader_abi *abi,
+                                       unsigned varying_id);
+
+
        LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, LLVMValueRef index);
 
        /**
@@ -88,6 +140,10 @@ struct ac_shader_abi {
                                          LLVMValueRef index,
                                          enum ac_descriptor_type desc_type,
                                          bool image, bool write);
+
+       /* Whether to clamp the shadow reference value to [0,1]on VI. Radeonsi currently
+        * uses it due to promoting D16 to D32, but radv needs it off. */
+       bool clamp_shadow_reference;
 };
 
 #endif /* AC_SHADER_ABI_H */