radv: do not load the local invocation index when it's unused

[mesa.git] / src / amd / common / ac_shader_info.c

diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c
index 33f68550bbcc22fa26a43eaae5dbef2069a5553b..3299b47e6b879f97b7934dd7fa4e947eec3df040 100644 (file)
--- a/src/amd/common/ac_shader_info.c
+++ b/src/amd/common/ac_shader_info.c
@@ -20,7 +20,7 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  * IN THE SOFTWARE.
  */
-#include "nir.h"
+#include "nir/nir.h"
 #include "ac_shader_info.h"
 #include "ac_nir_to_llvm.h"
 
@@ -39,8 +39,36 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, struct ac_shader_info *info)
        case nir_intrinsic_load_draw_id:
                info->vs.needs_draw_id = true;
                break;
+       case nir_intrinsic_load_instance_id:
+               info->vs.needs_instance_id = true;
+               break;
        case nir_intrinsic_load_num_work_groups:
-               info->cs.grid_components_used = instr->num_components;
+               info->cs.uses_grid_size = true;
+               break;
+       case nir_intrinsic_load_local_invocation_id:
+       case nir_intrinsic_load_work_group_id: {
+               unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
+               while (mask) {
+                       unsigned i = u_bit_scan(&mask);
+
+                       if (instr->intrinsic == nir_intrinsic_load_work_group_id)
+                               info->cs.uses_block_id[i] = true;
+                       else
+                               info->cs.uses_thread_id[i] = true;
+               }
+               break;
+       }
+       case nir_intrinsic_load_local_invocation_index:
+               info->cs.uses_local_invocation_idx = true;
+               break;
+       case nir_intrinsic_load_sample_id:
+               info->ps.force_persample = true;
+               break;
+       case nir_intrinsic_load_sample_pos:
+               info->ps.force_persample = true;
+               break;
+       case nir_intrinsic_load_view_index:
+               info->needs_multiview_view_index = true;
                break;
        case nir_intrinsic_vulkan_resource_index:
                info->desc_set_used_mask |= (1 << nir_intrinsic_desc_set(instr));
@@ -55,9 +83,18 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, struct ac_shader_info *info)
        case nir_intrinsic_image_atomic_xor:
        case nir_intrinsic_image_atomic_exchange:
        case nir_intrinsic_image_atomic_comp_swap:
-       case nir_intrinsic_image_size:
+       case nir_intrinsic_image_size: {
+               const struct glsl_type *type = instr->variables[0]->var->type;
+               if(instr->variables[0]->deref.child)
+                       type = instr->variables[0]->deref.child->type;
+
+               enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
+               if (dim == GLSL_SAMPLER_DIM_SUBPASS ||
+                   dim == GLSL_SAMPLER_DIM_SUBPASS_MS)
+                       info->ps.uses_input_attachments = true;
                mark_sampler_desc(instr->variables[0]->var, info);
                break;
+       }
        default:
                break;
        }
@@ -95,7 +132,7 @@ gather_info_input_decl(nir_shader *nir,
                       nir_variable *var,
                       struct ac_shader_info *info)
 {
-       switch (nir->stage) {
+       switch (nir->info.stage) {
        case MESA_SHADER_VERTEX:
                info->vs.has_vertex_buffers = true;
                break;