else
surf_level->dcc_slice_fast_clear_size = 0;
}
+
+ if (surf->flags & RADEON_SURF_CONTIGUOUS_DCC_LAYERS &&
+ surf->dcc_slice_size != surf_level->dcc_slice_fast_clear_size) {
+ surf->dcc_size = 0;
+ surf->num_dcc_levels = 0;
+ AddrDccOut->subLvlCompressible = false;
+ }
} else {
surf_level->dcc_slice_fast_clear_size = surf_level->dcc_fast_clear_size;
}
unsigned num_pipes = info->num_tile_pipes;
unsigned cl_width, cl_height;
- if (surf->flags & RADEON_SURF_Z_OR_SBUFFER ||
+ if (surf->flags & RADEON_SURF_Z_OR_SBUFFER || surf->is_linear ||
(config->info.samples >= 2 && !surf->fmask_size))
return;