nir: Rename Boolean-related opcodes to include 32 in the name
[mesa.git] / src / amd / common / ac_surface.c
index 2f4f0f8884f3749b8bd4049b2828e14c4fab134c..d8d927ee1c50ffa0ed6d3450a37209504f19f8b8 100644 (file)
@@ -27,7 +27,7 @@
 
 #include "ac_surface.h"
 #include "amd_family.h"
-#include "addrlib/amdgpu_asic_addr.h"
+#include "addrlib/src/amdgpu_asic_addr.h"
 #include "ac_gpu_info.h"
 #include "util/macros.h"
 #include "util/u_atomic.h"
@@ -39,7 +39,7 @@
 #include <amdgpu.h>
 #include <amdgpu_drm.h>
 
-#include "addrlib/addrinterface.h"
+#include "addrlib/inc/addrinterface.h"
 
 #ifndef CIASICIDGFXENGINE_SOUTHERNISLAND
 #define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A
@@ -151,6 +151,10 @@ static void addrlib_family_rev_id(enum radeon_family family,
                *addrlib_family = FAMILY_RV;
                *addrlib_revid = get_first(AMDGPU_RAVEN_RANGE);
                break;
+       case CHIP_RAVEN2:
+               *addrlib_family = FAMILY_RV;
+               *addrlib_revid = get_first(AMDGPU_RAVEN2_RANGE);
+               break;
        default:
                fprintf(stderr, "amdgpu: Unknown family.\n");
        }
@@ -588,8 +592,8 @@ void ac_compute_cmask(const struct radeon_info *info,
 
        unsigned base_align = num_pipes * pipe_interleave_bytes;
 
-       unsigned width = align(config->info.width, cl_width*8);
-       unsigned height = align(config->info.height, cl_height*8);
+       unsigned width = align(surf->u.legacy.level[0].nblk_x, cl_width*8);
+       unsigned height = align(surf->u.legacy.level[0].nblk_y, cl_height*8);
        unsigned slice_elements = (width * height) / (8*8);
 
        /* Each element of CMASK is a nibble. */
@@ -1034,8 +1038,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib,
 static int
 gfx9_get_preferred_swizzle_mode(ADDR_HANDLE addrlib,
                                ADDR2_COMPUTE_SURFACE_INFO_INPUT *in,
-                               bool is_fmask, unsigned flags,
-                               AddrSwizzleMode *swizzle_mode)
+                               bool is_fmask, AddrSwizzleMode *swizzle_mode)
 {
        ADDR_E_RETURNCODE ret;
        ADDR2_GET_PREFERRED_SURF_SETTING_INPUT sin = {0};
@@ -1060,16 +1063,6 @@ gfx9_get_preferred_swizzle_mode(ADDR_HANDLE addrlib,
        sin.numSamples = in->numSamples;
        sin.numFrags = in->numFrags;
 
-       if (flags & RADEON_SURF_SCANOUT) {
-               sin.preferredSwSet.sw_D = 1;
-               /* Raven only allows S for displayable surfaces with < 64 bpp, so
-                * allow it as fallback */
-               sin.preferredSwSet.sw_S = 1;
-       } else if (in->flags.depth || in->flags.stencil || is_fmask)
-               sin.preferredSwSet.sw_Z = 1;
-       else
-               sin.preferredSwSet.sw_S = 1;
-
        if (is_fmask) {
                sin.flags.display = 0;
                sin.flags.color = 0;
@@ -1269,8 +1262,7 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib,
                        fout.size = sizeof(ADDR2_COMPUTE_FMASK_INFO_OUTPUT);
 
                        ret = gfx9_get_preferred_swizzle_mode(addrlib, in,
-                                                             true, surf->flags,
-                                                             &fin.swizzleMode);
+                                                             true, &fin.swizzleMode);
                        if (ret != ADDR_OK)
                                return ret;
 
@@ -1472,8 +1464,7 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
                }
 
                r = gfx9_get_preferred_swizzle_mode(addrlib, &AddrSurfInfoIn,
-                                                   false, surf->flags,
-                                                   &AddrSurfInfoIn.swizzleMode);
+                                                   false, &AddrSurfInfoIn.swizzleMode);
                if (r)
                        return r;
                break;
@@ -1509,8 +1500,7 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
 
                if (!AddrSurfInfoIn.flags.depth) {
                        r = gfx9_get_preferred_swizzle_mode(addrlib, &AddrSurfInfoIn,
-                                                           false, surf->flags,
-                                                           &AddrSurfInfoIn.swizzleMode);
+                                                           false, &AddrSurfInfoIn.swizzleMode);
                        if (r)
                                return r;
                } else
@@ -1590,10 +1580,6 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
                        assert(0);
        }
 
-       /* Temporary workaround to prevent VM faults and hangs. */
-       if (info->family == CHIP_VEGA12)
-               surf->fmask_size *= 8;
-
        return 0;
 }