ac: update register and packet definitions for preemption

[mesa.git] / src / amd / common / sid.h

diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index 387689876d10c6fa76f8e321cc4fd689380d4b5d..1f54f94ae7b7f2f106eac838dda6d278ce53baba 100644 (file)
--- a/src/amd/common/sid.h
+++ b/src/amd/common/sid.h
@@ -32,9 +32,10 @@
 #define SI_SH_REG_OFFSET                     0x0000B000
 #define SI_SH_REG_END                        0x0000C000
 #define SI_CONTEXT_REG_OFFSET                0x00028000
-#define SI_CONTEXT_REG_END                   0x00029000
+#define SI_CONTEXT_REG_END                   0x00030000
 #define CIK_UCONFIG_REG_OFFSET               0x00030000
-#define CIK_UCONFIG_REG_END                  0x00038000
+#define CIK_UCONFIG_REG_END                  0x00040000
+
 
 #define EVENT_TYPE_CACHE_FLUSH                  0x6
 #define EVENT_TYPE_PS_PARTIAL_FLUSH            0x10
@@ -100,9 +101,19 @@
 #define PKT3_INDEX_BASE                        0x26
 #define PKT3_DRAW_INDEX_2                      0x27
 #define PKT3_CONTEXT_CONTROL                   0x28
-#define     CONTEXT_CONTROL_LOAD_ENABLE(x)     (((unsigned)(x) & 0x1) << 31)
-#define     CONTEXT_CONTROL_LOAD_CE_RAM(x)     (((unsigned)(x) & 0x1) << 28)
-#define     CONTEXT_CONTROL_SHADOW_ENABLE(x)   (((unsigned)(x) & 0x1) << 31)
+#define     CC0_LOAD_GLOBAL_CONFIG(x)          (((unsigned)(x) & 0x1) << 0)
+#define     CC0_LOAD_PER_CONTEXT_STATE(x)      (((unsigned)(x) & 0x1) << 1)
+#define     CC0_LOAD_GLOBAL_UCONFIG(x)         (((unsigned)(x) & 0x1) << 15)
+#define     CC0_LOAD_GFX_SH_REGS(x)            (((unsigned)(x) & 0x1) << 16)
+#define     CC0_LOAD_CS_SH_REGS(x)             (((unsigned)(x) & 0x1) << 24)
+#define     CC0_LOAD_CE_RAM(x)                 (((unsigned)(x) & 0x1) << 28)
+#define     CC0_UPDATE_LOAD_ENABLES(x)         (((unsigned)(x) & 0x1) << 31)
+#define     CC1_SHADOW_GLOBAL_CONFIG(x)        (((unsigned)(x) & 0x1) << 0)
+#define     CC1_SHADOW_PER_CONTEXT_STATE(x)    (((unsigned)(x) & 0x1) << 1)
+#define     CC1_SHADOW_GLOBAL_UCONFIG(x)       (((unsigned)(x) & 0x1) << 15)
+#define     CC1_SHADOW_GFX_SH_REGS(x)          (((unsigned)(x) & 0x1) << 16)
+#define     CC1_SHADOW_CS_SH_REGS(x)           (((unsigned)(x) & 0x1) << 24)
+#define     CC1_UPDATE_SHADOW_ENABLES(x)       (((unsigned)(x) & 0x1) << 31)
 #define PKT3_INDEX_TYPE                        0x2A /* not on GFX9 */
 #define PKT3_DRAW_INDIRECT_MULTI               0x2C
 #define   R_2C3_DRAW_INDEX_LOC                  0x2C3
@@ -185,6 +196,9 @@
 #define PKT3_ONE_REG_WRITE                     0x57 /* not on CIK */
 #define PKT3_ACQUIRE_MEM                       0x58 /* new for CIK */
 #define PKT3_REWIND                            0x59 /* VI+ [any ring] or CIK [compute ring only] */
+#define PKT3_LOAD_UCONFIG_REG                  0x5E /* GFX7+ */
+#define PKT3_LOAD_SH_REG                       0x5F
+#define PKT3_LOAD_CONTEXT_REG                  0x61
 #define PKT3_SET_CONFIG_REG                    0x68
 #define PKT3_SET_CONTEXT_REG                   0x69
 #define PKT3_SET_SH_REG                        0x76
@@ -198,7 +212,7 @@
 #define PKT3_INCREMENT_DE_COUNTER              0x85
 #define PKT3_WAIT_ON_CE_COUNTER                0x86
 #define PKT3_SET_SH_REG_INDEX                  0x9B
-#define PKT3_LOAD_CONTEXT_REG                  0x9F /* new for VI */
+#define PKT3_LOAD_CONTEXT_REG_INDEX            0x9F /* new for VI */
 
 #define PKT_TYPE_S(x)                   (((unsigned)(x) & 0x3) << 30)
 #define PKT_TYPE_G(x)                   (((x) >> 30) & 0x3)