#include "vulkan/radv_shader.h"
namespace aco {
-namespace {
+RegisterDemand get_live_changes(aco_ptr<Instruction>& instr)
+{
+ RegisterDemand changes;
+ for (const Definition& def : instr->definitions) {
+ if (!def.isTemp() || def.isKill())
+ continue;
+ changes += def.getTemp();
+ }
+
+ for (const Operand& op : instr->operands) {
+ if (!op.isTemp() || !op.isFirstKill())
+ continue;
+ changes -= op.getTemp();
+ }
+
+ return changes;
+}
+
+RegisterDemand get_temp_registers(aco_ptr<Instruction>& instr)
+{
+ RegisterDemand temp_registers;
+
+ for (Definition def : instr->definitions) {
+ if (!def.isTemp())
+ continue;
+ if (def.isKill())
+ temp_registers += def.getTemp();
+ }
+
+ for (Operand op : instr->operands) {
+ if (op.isTemp() && op.isLateKill() && op.isFirstKill())
+ temp_registers += op.getTemp();
+ }
+ return temp_registers;
+}
+
+RegisterDemand get_demand_before(RegisterDemand demand, aco_ptr<Instruction>& instr, aco_ptr<Instruction>& instr_before)
+{
+ demand -= get_live_changes(instr);
+ demand -= get_temp_registers(instr);
+ if (instr_before)
+ demand += get_temp_registers(instr_before);
+ return demand;
+}
+
+namespace {
void process_live_temps_per_block(Program *program, live& lives, Block* block,
std::set<unsigned>& worklist, std::vector<uint16_t>& phi_sgpr_ops)
{
register_demand.resize(block->instructions.size());
block->register_demand = RegisterDemand();
-
- std::set<Temp> live_sgprs;
- std::set<Temp> live_vgprs;
+ TempSet live = lives.live_out[block->index];
/* add the live_out_exec to live */
bool exec_live = false;
if (block->live_out_exec != Temp()) {
- live_sgprs.insert(block->live_out_exec);
- new_demand.sgpr += program->lane_mask.size();
+ live.insert(block->live_out_exec);
exec_live = true;
}
- /* split the live-outs from this block into the temporary sets */
- std::vector<std::set<Temp>>& live_temps = lives.live_out;
- for (const Temp temp : live_temps[block->index]) {
- const bool inserted = temp.is_linear()
- ? live_sgprs.insert(temp).second
- : live_vgprs.insert(temp).second;
- if (inserted) {
- new_demand += temp;
- }
- }
+ /* initialize register demand */
+ for (Temp t : live)
+ new_demand += t;
new_demand.sgpr -= phi_sgpr_ops[block->index];
/* traverse the instructions backwards */
if (!definition.isTemp()) {
continue;
}
+ if ((definition.isFixed() || definition.hasHint()) && definition.physReg() == vcc)
+ program->needs_vcc = true;
const Temp temp = definition.getTemp();
- size_t n = 0;
- if (temp.is_linear())
- n = live_sgprs.erase(temp);
- else
- n = live_vgprs.erase(temp);
+ const size_t n = live.erase(temp);
if (n) {
new_demand -= temp;
if (insn->opcode == aco_opcode::p_logical_end) {
new_demand.sgpr += phi_sgpr_ops[block->index];
} else {
+ /* we need to do this in a separate loop because the next one can
+ * setKill() for several operands at once and we don't want to
+ * overwrite that in a later iteration */
+ for (Operand& op : insn->operands)
+ op.setKill(false);
+
for (unsigned i = 0; i < insn->operands.size(); ++i)
{
Operand& operand = insn->operands[i];
- if (!operand.isTemp()) {
+ if (!operand.isTemp())
continue;
- }
+ if (operand.isFixed() && operand.physReg() == vcc)
+ program->needs_vcc = true;
const Temp temp = operand.getTemp();
- const bool inserted = temp.is_linear()
- ? live_sgprs.insert(temp).second
- : live_vgprs.insert(temp).second;
+ const bool inserted = live.insert(temp).second;
if (inserted) {
operand.setFirstKill(true);
for (unsigned j = i + 1; j < insn->operands.size(); ++j) {
insn->operands[j].setKill(true);
}
}
+ if (operand.isLateKill())
+ register_demand[idx] += temp;
new_demand += temp;
- } else {
- operand.setKill(false);
}
if (operand.isFixed() && operand.physReg() == exec)
assert(is_phi(insn));
assert(insn->definitions.size() == 1 && insn->definitions[0].isTemp());
Definition& definition = insn->definitions[0];
+ if ((definition.isFixed() || definition.hasHint()) && definition.physReg() == vcc)
+ program->needs_vcc = true;
const Temp temp = definition.getTemp();
- size_t n = 0;
-
- if (temp.is_linear())
- n = live_sgprs.erase(temp);
- else
- n = live_vgprs.erase(temp);
+ const size_t n = live.erase(temp);
if (n)
definition.setKill(false);
phi_idx--;
}
- /* now, we have the live-in sets and need to merge them into the live-out sets */
- for (unsigned pred_idx : block->logical_preds) {
- for (Temp vgpr : live_vgprs) {
- auto it = live_temps[pred_idx].insert(vgpr);
- if (it.second)
- worklist.insert(pred_idx);
- }
- }
+ /* now, we need to merge the live-ins into the live-out sets */
+ for (Temp t : live) {
+ std::vector<unsigned>& preds = t.is_linear() ? block->linear_preds : block->logical_preds;
- for (unsigned pred_idx : block->linear_preds) {
- for (Temp sgpr : live_sgprs) {
- auto it = live_temps[pred_idx].insert(sgpr);
+#ifndef NDEBUG
+ if (preds.empty())
+ aco_err(program, "Temporary never defined or are defined after use: %%%d in BB%d", t.id(), block->index);
+#endif
+
+ for (unsigned pred_idx : preds) {
+ auto it = lives.live_out[pred_idx].insert(t);
if (it.second)
worklist.insert(pred_idx);
}
: block->linear_preds;
for (unsigned i = 0; i < preds.size(); ++i) {
Operand &operand = insn->operands[i];
- if (!operand.isTemp()) {
+ if (!operand.isTemp())
continue;
- }
+ if (operand.isFixed() && operand.physReg() == vcc)
+ program->needs_vcc = true;
/* check if we changed an already processed block */
- const bool inserted = live_temps[preds[i]].insert(operand.getTemp()).second;
+ const bool inserted = lives.live_out[preds[i]].insert(operand.getTemp()).second;
if (inserted) {
operand.setKill(true);
worklist.insert(preds[i]);
phi_idx--;
}
- if (!(block->index != 0 || (live_vgprs.empty() && live_sgprs.empty()))) {
- aco_print_program(program, stderr);
- fprintf(stderr, "These temporaries are never defined or are defined after use:\n");
- for (Temp vgpr : live_vgprs)
- fprintf(stderr, "%%%d\n", vgpr.id());
- for (Temp sgpr : live_sgprs)
- fprintf(stderr, "%%%d\n", sgpr.id());
- abort();
- }
+ assert(block->index != 0 || (new_demand == RegisterDemand() && live.empty()));
+}
+
+unsigned calc_waves_per_workgroup(Program *program)
+{
+ /* When workgroup size is not known, just go with wave_size */
+ unsigned workgroup_size = program->workgroup_size == UINT_MAX
+ ? program->wave_size
+ : program->workgroup_size;
- assert(block->index != 0 || new_demand == RegisterDemand());
+ return align(workgroup_size, program->wave_size) / program->wave_size;
}
} /* end namespace */
{
if (program->chip_class >= GFX10) {
assert(!program->needs_flat_scr);
- assert(!program->needs_xnack_mask);
+ assert(!program->xnack_enabled);
return 2;
} else if (program->chip_class >= GFX8) {
if (program->needs_flat_scr)
return 6;
- else if (program->needs_xnack_mask)
+ else if (program->xnack_enabled)
return 4;
else if (program->needs_vcc)
return 2;
else
return 0;
} else {
- assert(!program->needs_xnack_mask);
+ assert(!program->xnack_enabled);
if (program->needs_flat_scr)
return 4;
else if (program->needs_vcc)
return align(std::max(sgprs, granule), granule);
}
+uint16_t get_vgpr_alloc(Program *program, uint16_t addressable_vgprs)
+{
+ assert(addressable_vgprs <= program->vgpr_limit);
+ uint16_t granule = program->vgpr_alloc_granule + 1;
+ return align(std::max(addressable_vgprs, granule), granule);
+}
+
uint16_t get_addr_sgpr_from_waves(Program *program, uint16_t max_waves)
{
uint16_t sgprs = program->physical_sgprs / max_waves & ~program->sgpr_alloc_granule;
return std::min(sgprs, program->sgpr_limit);
}
+uint16_t get_addr_vgpr_from_waves(Program *program, uint16_t max_waves)
+{
+ uint16_t vgprs = 256 / max_waves & ~program->vgpr_alloc_granule;
+ return std::min(vgprs, program->vgpr_limit);
+}
+
+void calc_min_waves(Program* program)
+{
+ unsigned waves_per_workgroup = calc_waves_per_workgroup(program);
+ /* currently min_waves is in wave64 waves */
+ if (program->wave_size == 32)
+ waves_per_workgroup = DIV_ROUND_UP(waves_per_workgroup, 2);
+
+ unsigned simd_per_cu = 4; /* TODO: different on Navi */
+ bool wgp = program->chip_class >= GFX10; /* assume WGP is used on Navi */
+ unsigned simd_per_cu_wgp = wgp ? simd_per_cu * 2 : simd_per_cu;
+
+ program->min_waves = DIV_ROUND_UP(waves_per_workgroup, simd_per_cu_wgp);
+}
+
void update_vgpr_sgpr_demand(Program* program, const RegisterDemand new_demand)
{
/* TODO: max_waves_per_simd, simd_per_cu and the number of physical vgprs for Navi */
unsigned max_waves_per_simd = 10;
+ if ((program->family >= CHIP_POLARIS10 && program->family <= CHIP_VEGAM) || program->chip_class >= GFX10_3)
+ max_waves_per_simd = 8;
unsigned simd_per_cu = 4;
bool wgp = program->chip_class >= GFX10; /* assume WGP is used on Navi */
unsigned simd_per_cu_wgp = wgp ? simd_per_cu * 2 : simd_per_cu;
unsigned lds_limit = wgp ? program->lds_limit * 2 : program->lds_limit;
- const int16_t vgpr_alloc = std::max<int16_t>(4, (new_demand.vgpr + 3) & ~3);
/* this won't compile, register pressure reduction necessary */
if (new_demand.vgpr > program->vgpr_limit || new_demand.sgpr > program->sgpr_limit) {
program->num_waves = 0;
program->max_reg_demand = new_demand;
} else {
program->num_waves = program->physical_sgprs / get_sgpr_alloc(program, new_demand.sgpr);
- program->num_waves = std::min<uint16_t>(program->num_waves, 256 / vgpr_alloc);
+ program->num_waves = std::min<uint16_t>(program->num_waves, 256 / get_vgpr_alloc(program, new_demand.vgpr));
program->max_waves = max_waves_per_simd;
/* adjust max_waves for workgroup and LDS limits */
- unsigned workgroup_size = program->wave_size;
- if (program->stage == compute_cs) {
- unsigned* bsize = program->info->cs.block_size;
- workgroup_size = bsize[0] * bsize[1] * bsize[2];
- }
- unsigned waves_per_workgroup = align(workgroup_size, program->wave_size) / program->wave_size;
-
+ unsigned waves_per_workgroup = calc_waves_per_workgroup(program);
unsigned workgroups_per_cu_wgp = max_waves_per_simd * simd_per_cu_wgp / waves_per_workgroup;
if (program->config->lds_size) {
unsigned lds = program->config->lds_size * program->lds_alloc_granule;
/* incorporate max_waves and calculate max_reg_demand */
program->num_waves = std::min<uint16_t>(program->num_waves, program->max_waves);
- program->max_reg_demand.vgpr = int16_t((256 / program->num_waves) & ~3);
+ program->max_reg_demand.vgpr = get_addr_vgpr_from_waves(program, program->num_waves);
program->max_reg_demand.sgpr = get_addr_sgpr_from_waves(program, program->num_waves);
}
}
std::vector<uint16_t> phi_sgpr_ops(program->blocks.size());
RegisterDemand new_demand;
+ program->needs_vcc = false;
+
/* this implementation assumes that the block idx corresponds to the block's position in program->blocks vector */
for (Block& block : program->blocks)
worklist.insert(block.index);
projects / mesa.git / blobdiff