return [('uint32_t', 'block', '-1'),
('uint32_t', 'imm', '0')]
elif self == Format.SMEM:
- return [('bool', 'can_reorder', 'true'),
+ return [('memory_sync_info', 'sync', 'memory_sync_info()'),
('bool', 'glc', 'false'),
('bool', 'dlc', 'false'),
('bool', 'nv', 'false')]
elif self == Format.MUBUF:
return [('unsigned', 'offset', None),
('bool', 'offen', None),
+ ('bool', 'swizzled', 'false'),
('bool', 'idxen', 'false'),
('bool', 'addr64', 'false'),
('bool', 'disable_wqm', 'false'),
elif self == Format.PSEUDO_REDUCTION:
return [('ReduceOp', 'op', None, 'reduce_op'),
('unsigned', 'cluster_size', '0')]
+ elif self == Format.PSEUDO_BARRIER:
+ return [('memory_sync_info', 'sync', None),
+ ('sync_scope', 'exec_scope', 'scope_invocation')]
elif self == Format.VINTRP:
return [('unsigned', 'attribute', None),
('unsigned', 'component', None)]
return [('uint16_t', 'dpp_ctrl', None),
('uint8_t', 'row_mask', '0xF'),
('uint8_t', 'bank_mask', '0xF'),
- ('bool', 'bound_ctrl', 'false')]
+ ('bool', 'bound_ctrl', 'true')]
elif self in [Format.FLAT, Format.GLOBAL, Format.SCRATCH]:
return [('uint16_t', 'offset', 0),
- ('bool', 'can_reorder', 'true'),
+ ('memory_sync_info', 'sync', 'memory_sync_info()'),
('bool', 'glc', 'false'),
('bool', 'slc', 'false'),
('bool', 'lds', 'false'),
opcode("p_phi")
opcode("p_linear_phi")
opcode("p_as_uniform")
+opcode("p_unit_test")
opcode("p_create_vector")
opcode("p_extract_vector")
opcode("p_cbranch_z", format=Format.PSEUDO_BRANCH)
opcode("p_cbranch_nz", format=Format.PSEUDO_BRANCH)
-opcode("p_memory_barrier_common", format=Format.PSEUDO_BARRIER) # atomic, buffer, image and shared
-opcode("p_memory_barrier_atomic", format=Format.PSEUDO_BARRIER)
-opcode("p_memory_barrier_buffer", format=Format.PSEUDO_BARRIER)
-opcode("p_memory_barrier_image", format=Format.PSEUDO_BARRIER)
-opcode("p_memory_barrier_shared", format=Format.PSEUDO_BARRIER)
-opcode("p_memory_barrier_gs_data", format=Format.PSEUDO_BARRIER)
-opcode("p_memory_barrier_gs_sendmsg", format=Format.PSEUDO_BARRIER)
+opcode("p_barrier", format=Format.PSEUDO_BARRIER)
opcode("p_spill")
opcode("p_reload")
# SMEM instructions: sbase input (2 sgpr), potentially 2 offset inputs, 1 sdata input/output
+# Unlike GFX10, GFX10.3 does not have SMEM store, atomic or scratch instructions
SMEM = {
# GFX6, GFX7, GFX8, GFX9, GFX10, name
(0x00, 0x00, 0x00, 0x00, 0x00, "s_load_dword"),
( -1, -1, 0x21, 0x21, 0x21, "s_dcache_wb"),
( -1, 0x1d, 0x22, 0x22, -1, "s_dcache_inv_vol"),
( -1, -1, 0x23, 0x23, -1, "s_dcache_wb_vol"),
- (0x1e, 0x1e, 0x24, 0x24, 0x24, "s_memtime"),
+ (0x1e, 0x1e, 0x24, 0x24, 0x24, "s_memtime"), #GFX6-GFX10
( -1, -1, 0x25, 0x25, 0x25, "s_memrealtime"),
( -1, -1, 0x26, 0x26, 0x26, "s_atc_probe"),
( -1, -1, 0x27, 0x27, 0x27, "s_atc_probe_buffer"),
(0x1f, 0x1f, 0x16, 0x16, 0x1f, "v_mac_f32", True),
(0x20, 0x20, 0x17, 0x17, 0x20, "v_madmk_f32", False),
(0x21, 0x21, 0x18, 0x18, 0x21, "v_madak_f32", False),
+ (0x24, 0x24, -1, -1, -1, "v_mbcnt_hi_u32_b32", False),
(0x25, 0x25, 0x19, 0x19, -1, "v_add_co_u32", False), # VOP3B only in RDNA
(0x26, 0x26, 0x1a, 0x1a, -1, "v_sub_co_u32", False), # VOP3B only in RDNA
(0x27, 0x27, 0x1b, 0x1b, -1, "v_subrev_co_u32", False), # VOP3B only in RDNA
(0x08, 0x08, 0x08, 0x08, 0x08, "v_cvt_i32_f32", True, False),
(0x09, 0x09, -1, -1, 0x09, "v_mov_fed_b32", True, False), # LLVM mentions it for GFX8_9
(0x0a, 0x0a, 0x0a, 0x0a, 0x0a, "v_cvt_f16_f32", True, True),
+ ( -1, -1, -1, -1, -1, "p_cvt_f16_f32_rtne", True, True),
(0x0b, 0x0b, 0x0b, 0x0b, 0x0b, "v_cvt_f32_f16", True, True),
(0x0c, 0x0c, 0x0c, 0x0c, 0x0c, "v_cvt_rpi_i32_f32", True, False),
(0x0d, 0x0d, 0x0d, 0x0d, 0x0d, "v_cvt_flr_i32_f32", True, False),
# VOP3 instructions: 3 inputs, 1 output
# VOP3b instructions: have a unique scalar output, e.g. VOP2 with vcc out
VOP3 = {
- (0x140, 0x140, 0x1c0, 0x1c0, 0x140, "v_mad_legacy_f32", True, True),
+ (0x140, 0x140, 0x1c0, 0x1c0, 0x140, "v_mad_legacy_f32", True, True), # GFX6-GFX10
(0x141, 0x141, 0x1c1, 0x1c1, 0x141, "v_mad_f32", True, True),
(0x142, 0x142, 0x1c2, 0x1c2, 0x142, "v_mad_i32_i24", False, False),
(0x143, 0x143, 0x1c3, 0x1c3, 0x143, "v_mad_u32_u24", False, False),
( -1, -1, 0x28a, 0x28a, 0x361, "v_writelane_b32_e64", False, False),
(0x122, 0x122, 0x28b, 0x28b, 0x364, "v_bcnt_u32_b32", False, False),
(0x123, 0x123, 0x28c, 0x28c, 0x365, "v_mbcnt_lo_u32_b32", False, False),
- (0x124, 0x124, 0x28d, 0x28d, 0x366, "v_mbcnt_hi_u32_b32", False, False),
+ ( -1, -1, 0x28d, 0x28d, 0x366, "v_mbcnt_hi_u32_b32_e64", False, False),
( -1, -1, 0x28f, 0x28f, 0x2ff, "v_lshlrev_b64", False, False),
( -1, -1, 0x290, 0x290, 0x300, "v_lshrrev_b64", False, False),
( -1, -1, 0x291, 0x291, 0x301, "v_ashrrev_i64", False, False),
( -1, -1, -1, -1, 0x307, "v_lshrrev_b16_e64", False, False),
( -1, -1, -1, -1, 0x308, "v_ashrrev_i16_e64", False, False),
( -1, -1, -1, -1, 0x314, "v_lshlrev_b16_e64", False, False),
+ ( -1, -1, -1, -1, 0x140, "v_fma_legacy_f32", True, True), #GFX10.3+
}
for (gfx6, gfx7, gfx8, gfx9, gfx10, name, in_mod, out_mod) in VOP3:
opcode(name, gfx7, gfx9, gfx10, Format.VOP3A, in_mod, out_mod)
(0x60, 0x60, -1, -1, 0x60, "buffer_atomic_fmax_x2"),
( -1, -1, -1, -1, 0x71, "buffer_gl0_inv"),
( -1, -1, -1, -1, 0x72, "buffer_gl1_inv"),
+ ( -1, -1, -1, -1, 0x34, "buffer_atomic_csub"), #GFX10.3+. seems glc must be set
}
for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in MUBUF:
opcode(name, gfx7, gfx9, gfx10, Format.MUBUF, is_atomic = "atomic" in name)
for (code, name) in IMAGE:
opcode(name, code, code, code, Format.MIMG)
+opcode("image_msaa_load", -1, -1, 0x80, Format.MIMG) #GFX10.3+
+
IMAGE_ATOMIC = {
(0x0f, 0x0f, 0x10, "image_atomic_swap"),
(0x10, 0x10, 0x11, "image_atomic_cmpswap"),
( -1, 0x5e, "global_atomic_fcmpswap_x2"),
( -1, 0x5f, "global_atomic_fmin_x2"),
( -1, 0x60, "global_atomic_fmax_x2"),
+ ( -1, 0x16, "global_load_dword_addtid"), #GFX10.3+
+ ( -1, 0x17, "global_store_dword_addtid"), #GFX10.3+
+ ( -1, 0x34, "global_atomic_csub"), #GFX10.3+. seems glc must be set
}
for (gfx8, gfx10, name) in GLOBAL:
opcode(name, -1, gfx8, gfx10, Format.GLOBAL, is_atomic = "atomic" in name)
names = set([op_to_name[key], op.name])
if ver in ['gfx8', 'gfx9'] and names == set(['v_mul_lo_i32', 'v_mul_lo_u32']):
continue
+ # v_mad_legacy_f32 is replaced with v_fma_legacy_f32 on GFX10.3
+ if ver == 'gfx10' and names == set(['v_mad_legacy_f32', 'v_fma_legacy_f32']):
+ continue
print('%s and %s share the same opcode number (%s)' % (op_to_name[key], op.name, ver))
sys.exit(1)
projects / mesa.git / blobdiff