radv: rework the error function helpers a bit
[mesa.git] / src / amd / vulkan / radv_cmd_buffer.c
index 92556e3b5e4043301ffa783c49cf55d04257882f..0e6a310cf8e892e73a2c8fb3bca515451753479b 100644 (file)
@@ -483,7 +483,8 @@ radv_cmd_buffer_resize_upload_buf(struct radv_cmd_buffer *cmd_buffer,
                                       RADEON_DOMAIN_GTT,
                                       RADEON_FLAG_CPU_ACCESS|
                                       RADEON_FLAG_NO_INTERPROCESS_SHARING |
-                                      RADEON_FLAG_32BIT,
+                                      RADEON_FLAG_32BIT |
+                                      RADEON_FLAG_GTT_WC,
                                       RADV_BO_PRIORITY_UPLOAD_BUFFER);
 
        if (!bo) {
@@ -2716,13 +2717,10 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer,
                        if (cmd_buffer->device->physical_device->rad_info.chip_class != GFX8 && stride)
                                num_records /= stride;
 
-                       desc[0] = va;
-                       desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(stride);
-                       desc[2] = num_records;
-                       desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
-                                 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
-                                 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
-                                 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
+                       uint32_t rsrc_word3 = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
+                                             S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
+                                             S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
+                                             S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
 
                        if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) {
                                /* OOB_SELECT chooses the out-of-bounds check:
@@ -2731,13 +2729,18 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer,
                                 */
                                int oob_select = stride ? V_008F0C_OOB_SELECT_STRUCTURED : V_008F0C_OOB_SELECT_RAW;
 
-                               desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_UINT) |
-                                          S_008F0C_OOB_SELECT(oob_select) |
-                                          S_008F0C_RESOURCE_LEVEL(1);
+                               rsrc_word3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_UINT) |
+                                            S_008F0C_OOB_SELECT(oob_select) |
+                                            S_008F0C_RESOURCE_LEVEL(1);
                        } else {
-                               desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_UINT) |
-                                          S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+                               rsrc_word3 |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_UINT) |
+                                            S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
                        }
+
+                       desc[0] = va;
+                       desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32) | S_008F04_STRIDE(stride);
+                       desc[2] = num_records;
+                       desc[3] = rsrc_word3;
                }
 
                va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);
@@ -2828,21 +2831,23 @@ radv_flush_streamout_descriptors(struct radv_cmd_buffer *cmd_buffer)
                        if (cmd_buffer->device->physical_device->use_ngg_streamout)
                                size = buffer->size - sb[i].offset;
 
-                       desc[0] = va;
-                       desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
-                       desc[2] = size;
-                       desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
-                                 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
-                                 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
-                                 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
+                       uint32_t rsrc_word3 = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
+                                             S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
+                                             S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
+                                             S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W);
 
                        if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) {
-                               desc[3] |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
-                                          S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
-                                          S_008F0C_RESOURCE_LEVEL(1);
+                               rsrc_word3 |= S_008F0C_FORMAT(V_008F0C_IMG_FORMAT_32_FLOAT) |
+                                             S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_RAW) |
+                                             S_008F0C_RESOURCE_LEVEL(1);
                        } else {
-                               desc[3] |= S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+                               rsrc_word3 |= S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
                        }
+
+                       desc[0] = va;
+                       desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
+                       desc[2] = size;
+                       desc[3] = rsrc_word3;
                }
 
                va = radv_buffer_get_va(cmd_buffer->upload.upload_bo);
@@ -3543,6 +3548,7 @@ radv_cmd_state_setup_attachments(struct radv_cmd_buffer *cmd_buffer,
                }
 
                state->attachments[i].current_layout = att->initial_layout;
+               state->attachments[i].current_in_render_loop = false;
                state->attachments[i].current_stencil_layout = att->stencil_initial_layout;
                state->attachments[i].sample_location.count = 0;