radv: fix using LOAD_CONTEXT_REG with old GFX ME firmwares on GFX8

[mesa.git] / src / amd / vulkan / radv_cmd_buffer.c

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 989372e48b782ac532d4d949e8c1fb8d8eb79a05..ad0b934ddfc6cbb00883f7c9779b03e63884fee1 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1373,7 +1373,7 @@ radv_load_ds_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
 
        uint32_t reg = R_028028_DB_STENCIL_CLEAR + 4 * reg_offset;
 
-       if (cmd_buffer->device->physical_device->rad_info.chip_class >= VI) {
+       if (cmd_buffer->device->physical_device->has_load_ctx_reg_pkt) {
                radeon_emit(cs, PKT3(PKT3_LOAD_CONTEXT_REG, 3, 0));
                radeon_emit(cs, va);
                radeon_emit(cs, va >> 32);
@@ -1535,14 +1535,13 @@ radv_load_color_clear_metadata(struct radv_cmd_buffer *cmd_buffer,
 
        uint32_t reg = R_028C8C_CB_COLOR0_CLEAR_WORD0 + cb_idx * 0x3c;
 
-       if (cmd_buffer->device->physical_device->rad_info.chip_class >= VI) {
+       if (cmd_buffer->device->physical_device->has_load_ctx_reg_pkt) {
                radeon_emit(cs, PKT3(PKT3_LOAD_CONTEXT_REG, 3, cmd_buffer->state.predicating));
                radeon_emit(cs, va);
                radeon_emit(cs, va >> 32);
                radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2);
                radeon_emit(cs, 2);
        } else {
-               /* TODO: Figure out how to use LOAD_CONTEXT_REG on SI/CIK. */
                radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, cmd_buffer->state.predicating));
                radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_SRC_MEM) |
                                COPY_DATA_DST_SEL(COPY_DATA_REG) |