nir_print_shader(shader->nir, f);
}
- fprintf(stderr, "DISASM:\n%s\n", shader->disasm_string);
+ fprintf(f, "LLVM IR:\n%s\n", shader->llvm_ir_string);
+ fprintf(f, "DISASM:\n%s\n", shader->disasm_string);
radv_shader_dump_stats(pipeline->device, shader, stage, f);
}
pclose(p);
}
-static void
+void
radv_dump_enabled_options(struct radv_device *device, FILE *f)
{
uint64_t mask;
- fprintf(f, "Enabled debug options: ");
+ if (device->instance->debug_flags) {
+ fprintf(f, "Enabled debug options: ");
- mask = device->instance->debug_flags;
- while (mask) {
- int i = u_bit_scan64(&mask);
- fprintf(f, "%s, ", radv_get_debug_option_name(i));
+ mask = device->instance->debug_flags;
+ while (mask) {
+ int i = u_bit_scan64(&mask);
+ fprintf(f, "%s, ", radv_get_debug_option_name(i));
+ }
+ fprintf(f, "\n");
}
- fprintf(f, "\n");
- fprintf(f, "Enabled perftest options: ");
+ if (device->instance->perftest_flags) {
+ fprintf(f, "Enabled perftest options: ");
- mask = device->instance->perftest_flags;
- while (mask) {
- int i = u_bit_scan64(&mask);
- fprintf(f, "%s, ", radv_get_perftest_option_name(i));
+ mask = device->instance->perftest_flags;
+ while (mask) {
+ int i = u_bit_scan64(&mask);
+ fprintf(f, "%s, ", radv_get_perftest_option_name(i));
+ }
+ fprintf(f, "\n");
}
- fprintf(f, "\n");
}
static void