*
* [0]: primary trace ID
* [1]: secondary trace ID
- * [2-3]: 64-bit GFX pipeline pointer
- * [4-5]: 64-bit COMPUTE pipeline pointer
+ * [2-3]: 64-bit GFX ring pipeline pointer
+ * [4-5]: 64-bit COMPUTE ring pipeline pointer
* [6-7]: 64-bit descriptor set #0 pointer
* ...
* [68-69]: 64-bit descriptor set #31 pointer
shader->ir_string);
fprintf(f, "DISASM:\n%s\n", shader->disasm_string);
- radv_shader_dump_stats(pipeline->device, shader, stage, f);
+ radv_dump_shader_stats(pipeline->device, pipeline, stage, f);
}
static void
}
}
-static void
-radv_dump_pipeline_state(struct radv_pipeline *pipeline,
- VkShaderStageFlagBits active_stages, FILE *f)
-{
- radv_dump_shaders(pipeline, active_stages, f);
- radv_dump_annotated_shaders(pipeline, active_stages, f);
-}
-
-static void
-radv_dump_graphics_state(struct radv_device *device,
- struct radv_pipeline *graphics_pipeline,
- struct radv_pipeline *compute_pipeline, FILE *f)
-{
- VkShaderStageFlagBits active_stages;
-
- if (graphics_pipeline) {
- active_stages = graphics_pipeline->active_stages;
- radv_dump_pipeline_state(graphics_pipeline, active_stages, f);
- }
-
- if (compute_pipeline) {
- active_stages = VK_SHADER_STAGE_COMPUTE_BIT;
- radv_dump_pipeline_state(compute_pipeline, active_stages, f);
- }
-
- radv_dump_descriptors(device, f);
-}
-
-static void
-radv_dump_compute_state(struct radv_device *device,
- struct radv_pipeline *compute_pipeline, FILE *f)
-{
- VkShaderStageFlagBits active_stages = VK_SHADER_STAGE_COMPUTE_BIT;
-
- if (!compute_pipeline)
- return;
-
- radv_dump_pipeline_state(compute_pipeline, active_stages, f);
- radv_dump_descriptors(device, f);
-}
-
static struct radv_pipeline *
-radv_get_saved_graphics_pipeline(struct radv_device *device)
+radv_get_saved_pipeline(struct radv_device *device, enum ring_type ring)
{
uint64_t *ptr = (uint64_t *)device->trace_id_ptr;
+ int offset = ring == RING_GFX ? 1 : 2;
- return *(struct radv_pipeline **)(ptr + 1);
+ return *(struct radv_pipeline **)(ptr + offset);
}
-static struct radv_pipeline *
-radv_get_saved_compute_pipeline(struct radv_device *device)
+static void
+radv_dump_queue_state(struct radv_queue *queue, FILE *f)
{
- uint64_t *ptr = (uint64_t *)device->trace_id_ptr;
+ enum ring_type ring = radv_queue_family_to_ring(queue->queue_family_index);
+ struct radv_pipeline *pipeline;
+
+ fprintf(f, "RING_%s:\n", ring == RING_GFX ? "GFX" : "COMPUTE");
- return *(struct radv_pipeline **)(ptr + 2);
+ pipeline = radv_get_saved_pipeline(queue->device, ring);
+ if (pipeline) {
+ radv_dump_shaders(pipeline, pipeline->active_stages, f);
+ radv_dump_annotated_shaders(pipeline, pipeline->active_stages, f);
+ radv_dump_descriptors(queue->device, f);
+ }
}
static void
void
radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_cmdbuf *cs)
{
- struct radv_pipeline *graphics_pipeline, *compute_pipeline;
struct radv_device *device = queue->device;
enum ring_type ring;
uint64_t addr;
if (!hang_occurred && !vm_fault_occurred)
return;
- graphics_pipeline = radv_get_saved_graphics_pipeline(device);
- compute_pipeline = radv_get_saved_compute_pipeline(device);
-
radv_dump_trace(queue->device, cs);
fprintf(stderr, "GPU hang report:\n\n");
radv_dump_device_name(device, stderr);
+ ac_print_gpu_info(&device->physical_device->rad_info);
radv_dump_enabled_options(device, stderr);
radv_dump_dmesg(stderr);
}
radv_dump_debug_registers(device, stderr);
-
- switch (ring) {
- case RING_GFX:
- fprintf(stderr, "RING_GFX:\n");
- radv_dump_graphics_state(queue->device,
- graphics_pipeline, compute_pipeline,
- stderr);
- break;
- case RING_COMPUTE:
- fprintf(stderr, "RING_COMPUTE:\n");
- radv_dump_compute_state(queue->device,
- compute_pipeline, stderr);
- break;
- default:
- assert(0);
- break;
- }
+ radv_dump_queue_state(queue, stderr);
abort();
}
RADEON_DOMAIN_VRAM,
RADEON_FLAG_CPU_ACCESS |
RADEON_FLAG_NO_INTERPROCESS_SHARING |
- RADEON_FLAG_ZERO_VRAM,
+ RADEON_FLAG_ZERO_VRAM |
+ RADEON_FLAG_32BIT,
RADV_BO_PRIORITY_SCRATCH);
if (!device->tma_bo)
return false;
struct radv_sq_hw_reg *regs = (struct radv_sq_hw_reg *)&device->tma_ptr[6];
fprintf(stderr, "\nHardware registers:\n");
- ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
- R_000002_SQ_HW_REG_STATUS, regs->status, ~0);
- ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
- R_000003_SQ_HW_REG_TRAP_STS, regs->trap_sts, ~0);
- ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
- R_000004_SQ_HW_REG_HW_ID, regs->hw_id, ~0);
- ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
- R_000007_SQ_HW_REG_IB_STS, regs->ib_sts, ~0);
+ if (device->physical_device->rad_info.chip_class >= GFX10) {
+ ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
+ R_000408_SQ_WAVE_STATUS, regs->status, ~0);
+ ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
+ R_00040C_SQ_WAVE_TRAPSTS, regs->trap_sts, ~0);
+ ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
+ R_00045C_SQ_WAVE_HW_ID1, regs->hw_id, ~0);
+ ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
+ R_00041C_SQ_WAVE_IB_STS, regs->ib_sts, ~0);
+ } else {
+ ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
+ R_000048_SQ_WAVE_STATUS, regs->status, ~0);
+ ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
+ R_00004C_SQ_WAVE_TRAPSTS, regs->trap_sts, ~0);
+ ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
+ R_000050_SQ_WAVE_HW_ID, regs->hw_id, ~0);
+ ac_dump_reg(stderr, device->physical_device->rad_info.chip_class,
+ R_00005C_SQ_WAVE_IB_STS, regs->ib_sts, ~0);
+ }
fprintf(stderr, "\n\n");
}
projects / mesa.git / blobdiff