radv/gfx10: implement a GE bug workaround

[mesa.git] / src / amd / vulkan / radv_debug.h

diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h
index e59f4898f0a43b43bdd42306c61607585e7b156d..6414e882676b2c9a53833f92e8b341b5ee20515f 100644 (file)
--- a/src/amd/vulkan/radv_debug.h
+++ b/src/amd/vulkan/radv_debug.h
@@ -47,22 +47,31 @@ enum {
        RADV_DEBUG_NO_OUT_OF_ORDER   = 0x20000,
        RADV_DEBUG_INFO              = 0x40000,
        RADV_DEBUG_ERRORS            = 0x80000,
+       RADV_DEBUG_STARTUP           = 0x100000,
+       RADV_DEBUG_CHECKIR           = 0x200000,
+       RADV_DEBUG_NOTHREADLLVM      = 0x400000,
+       RADV_DEBUG_NOBINNING         = 0x800000,
+       RADV_DEBUG_NO_LOAD_STORE_OPT = 0x1000000,
+       RADV_DEBUG_NO_NGG            = 0x2000000,
 };
 
 enum {
        RADV_PERFTEST_NO_BATCHCHAIN  =   0x1,
        RADV_PERFTEST_SISCHED        =   0x2,
        RADV_PERFTEST_LOCAL_BOS      =   0x4,
-       RADV_PERFTEST_BINNING     =   0x8,
-       RADV_PERFTEST_OUT_OF_ORDER   =  0x10,
-       RADV_PERFTEST_DCC_MSAA       =  0x20,
+       RADV_PERFTEST_OUT_OF_ORDER   =   0x8,
+       RADV_PERFTEST_DCC_MSAA       =  0x10,
+       RADV_PERFTEST_BO_LIST        =  0x20,
+       RADV_PERFTEST_SHADER_BALLOT  =  0x40,
+       RADV_PERFTEST_TC_COMPAT_CMASK = 0x80,
+       RADV_PERFTEST_CS_WAVE_32     = 0x100,
 };
 
 bool
 radv_init_trace(struct radv_device *device);
 
 void
-radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs);
+radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_cmdbuf *cs);
 
 void
 radv_print_spirv(uint32_t *data, uint32_t size, FILE *fp);