radv/gfx10: Use correct ES shader for es_vgpr_comp_cnt for GS.

[mesa.git] / src / amd / vulkan / radv_debug.h

diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h
index 804f620690db1d24f82312c68b62bcb3d8dbd2c6..75e28000e1457693cfa0e2f747e28939df517908 100644 (file)
--- a/src/amd/vulkan/radv_debug.h
+++ b/src/amd/vulkan/radv_debug.h
@@ -43,22 +43,38 @@ enum {
        RADV_DEBUG_SYNC_SHADERS      = 0x2000,
        RADV_DEBUG_NO_SISCHED        = 0x4000,
        RADV_DEBUG_PREOPTIR          = 0x8000,
+       RADV_DEBUG_NO_DYNAMIC_BOUNDS = 0x10000,
+       RADV_DEBUG_NO_OUT_OF_ORDER   = 0x20000,
+       RADV_DEBUG_INFO              = 0x40000,
+       RADV_DEBUG_ERRORS            = 0x80000,
+       RADV_DEBUG_STARTUP           = 0x100000,
+       RADV_DEBUG_CHECKIR           = 0x200000,
+       RADV_DEBUG_NOTHREADLLVM      = 0x400000,
+       RADV_DEBUG_NOBINNING         = 0x800000,
+       RADV_DEBUG_NO_LOAD_STORE_OPT = 0x1000000,
 };
 
 enum {
        RADV_PERFTEST_NO_BATCHCHAIN  =   0x1,
        RADV_PERFTEST_SISCHED        =   0x2,
        RADV_PERFTEST_LOCAL_BOS      =   0x4,
-       RADV_PERFTEST_BINNING     =   0x8,
+       RADV_PERFTEST_OUT_OF_ORDER   =   0x8,
+       RADV_PERFTEST_DCC_MSAA       =  0x10,
+       RADV_PERFTEST_BO_LIST        =  0x20,
+       RADV_PERFTEST_SHADER_BALLOT  =  0x40,
+       RADV_PERFTEST_TC_COMPAT_CMASK = 0x80,
 };
 
 bool
 radv_init_trace(struct radv_device *device);
 
 void
-radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs);
+radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_cmdbuf *cs);
 
 void
 radv_print_spirv(uint32_t *data, uint32_t size, FILE *fp);
 
+void
+radv_dump_enabled_options(struct radv_device *device, FILE *f);
+
 #endif