radv: get rid of buffer object priorities

[mesa.git] / src / amd / vulkan / radv_device.c

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 1c0a50c82fa4037d837dbe7f5d4ea2d350eb71e6..8274b6ea096ca9a1f31f987fd2692602304e2684 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1928,10 +1928,10 @@ radv_emit_gs_ring_sizes(struct radv_queue *queue, struct radeon_cmdbuf *cs,
                return;
 
        if (esgs_ring_bo)
-               radv_cs_add_buffer(queue->device->ws, cs, esgs_ring_bo, 8);
+               radv_cs_add_buffer(queue->device->ws, cs, esgs_ring_bo);
 
        if (gsvs_ring_bo)
-               radv_cs_add_buffer(queue->device->ws, cs, gsvs_ring_bo, 8);
+               radv_cs_add_buffer(queue->device->ws, cs, gsvs_ring_bo);
 
        if (queue->device->physical_device->rad_info.chip_class >= CIK) {
                radeon_set_uconfig_reg_seq(cs, R_030900_VGT_ESGS_RING_SIZE, 2);
@@ -1956,7 +1956,7 @@ radv_emit_tess_factor_ring(struct radv_queue *queue, struct radeon_cmdbuf *cs,
 
        tf_va = radv_buffer_get_va(tess_rings_bo);
 
-       radv_cs_add_buffer(queue->device->ws, cs, tess_rings_bo, 8);
+       radv_cs_add_buffer(queue->device->ws, cs, tess_rings_bo);
 
        if (queue->device->physical_device->rad_info.chip_class >= CIK) {
                radeon_set_uconfig_reg(cs, R_030938_VGT_TF_RING_SIZE,
@@ -1990,7 +1990,7 @@ radv_emit_compute_scratch(struct radv_queue *queue, struct radeon_cmdbuf *cs,
 
        scratch_va = radv_buffer_get_va(compute_scratch_bo);
 
-       radv_cs_add_buffer(queue->device->ws, cs, compute_scratch_bo, 8);
+       radv_cs_add_buffer(queue->device->ws, cs, compute_scratch_bo);
 
        radeon_set_sh_reg_seq(cs, R_00B900_COMPUTE_USER_DATA_0, 2);
        radeon_emit(cs, scratch_va);
@@ -2010,7 +2010,7 @@ radv_emit_global_shader_pointers(struct radv_queue *queue,
 
        va = radv_buffer_get_va(descriptor_bo);
 
-       radv_cs_add_buffer(queue->device->ws, cs, descriptor_bo, 8);
+       radv_cs_add_buffer(queue->device->ws, cs, descriptor_bo);
 
        if (queue->device->physical_device->rad_info.chip_class >= GFX9) {
                uint32_t regs[] = {R_00B030_SPI_SHADER_USER_DATA_PS_0,
@@ -2189,7 +2189,7 @@ radv_get_preamble_cs(struct radv_queue *queue,
                dest_cs[i] = cs;
 
                if (scratch_bo)
-                       radv_cs_add_buffer(queue->device->ws, cs, scratch_bo, 8);
+                       radv_cs_add_buffer(queue->device->ws, cs, scratch_bo);
 
                if (descriptor_bo != queue->descriptor_bo) {
                        uint32_t *map = (uint32_t*)queue->device->ws->buffer_map(descriptor_bo);