radv: misc GFX9 changes.

[mesa.git] / src / amd / vulkan / radv_device.c

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 9d510ea59ea0cad938bd41b8a040c6b03ac9ac4b..98339fb73efd0f8d0a6dd029b044c2d961a6ed7a 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -304,6 +304,12 @@ radv_physical_device_init(struct radv_physical_device *device,
 
        radv_get_device_uuid(drm_device, device->device_uuid);
 
+       if (device->rad_info.family == CHIP_STONEY ||
+           device->rad_info.chip_class >= GFX9) {
+               device->has_rbplus = true;
+               device->rbplus_allowed = device->rad_info.family == CHIP_STONEY;
+       }
+
        return VK_SUCCESS;
 
 fail:
@@ -1722,6 +1728,10 @@ radv_get_preamble_cs(struct radv_queue *queue,
                                                       S_030938_SIZE(tess_factor_ring_size / 4));
                                radeon_set_uconfig_reg(cs, R_030940_VGT_TF_MEMORY_BASE,
                                                       tf_va >> 8);
+                               if (queue->device->physical_device->rad_info.chip_class >= GFX9) {
+                                       radeon_set_uconfig_reg(cs, R_030944_VGT_TF_MEMORY_BASE_HI,
+                                                              tf_va >> 40);
+                               }
                                radeon_set_uconfig_reg(cs, R_03093C_VGT_HS_OFFCHIP_PARAM, hs_offchip_param);
                        } else {
                                radeon_set_config_reg(cs, R_008988_VGT_TF_RING_SIZE,