if (!strcmp(family, ac_get_llvm_processor_name(i))) {
/* Override family and chip_class. */
device->rad_info.family = i;
+ device->rad_info.name = "OVERRIDDEN";
if (i >= CHIP_NAVI10)
device->rad_info.chip_class = GFX10;
else
device->rad_info.chip_class = GFX6;
+ /* Don't submit any IBs. */
+ device->instance->debug_flags |= RADV_DEBUG_NOOP;
return;
}
}
radv_handle_env_var_force_family(device);
device->use_aco = instance->perftest_flags & RADV_PERFTEST_ACO;
- if (device->rad_info.chip_class < GFX7 && device->use_aco) {
- fprintf(stderr, "WARNING: disabling ACO on unsupported GPUs.\n");
- device->use_aco = false;
- }
snprintf(device->name, sizeof(device->name),
"AMD RADV%s %s (LLVM " MESA_LLVM_VERSION_STRING ")", device->use_aco ? "/ACO" : "",
disk_cache_format_hex_id(buf, device->cache_uuid, VK_UUID_SIZE * 2);
device->disk_cache = disk_cache_create(device->name, buf, shader_env_flags);
- if (device->rad_info.chip_class < GFX8 ||
- device->rad_info.chip_class > GFX9)
+ if (device->rad_info.chip_class < GFX8)
fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n");
radv_get_driver_uuid(&device->driver_uuid);
{"allentrypoints", RADV_DEBUG_ALL_ENTRYPOINTS},
{"metashaders", RADV_DEBUG_DUMP_META_SHADERS},
{"nomemorycache", RADV_DEBUG_NO_MEMORY_CACHE},
+ {"noop", RADV_DEBUG_NOOP},
{NULL, 0}
};
features->storagePushConstant8 = enabled;
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_FLOAT16_INT8_FEATURES_KHR: {
- VkPhysicalDeviceShaderFloat16Int8FeaturesKHR *features =
- (VkPhysicalDeviceShaderFloat16Int8FeaturesKHR*)ext;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_FLOAT16_INT8_FEATURES: {
+ VkPhysicalDeviceShaderFloat16Int8Features *features =
+ (VkPhysicalDeviceShaderFloat16Int8Features*)ext;
features->shaderFloat16 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco;
features->shaderInt8 = !pdevice->use_aco;
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_ATOMIC_INT64_FEATURES_KHR: {
- VkPhysicalDeviceShaderAtomicInt64FeaturesKHR *features =
- (VkPhysicalDeviceShaderAtomicInt64FeaturesKHR *)ext;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_ATOMIC_INT64_FEATURES: {
+ VkPhysicalDeviceShaderAtomicInt64Features *features =
+ (VkPhysicalDeviceShaderAtomicInt64Features *)ext;
features->shaderBufferInt64Atomics = LLVM_VERSION_MAJOR >= 9;
features->shaderSharedInt64Atomics = LLVM_VERSION_MAJOR >= 9;
break;
features->ycbcrImageArrays = true;
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_UNIFORM_BUFFER_STANDARD_LAYOUT_FEATURES_KHR: {
- VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR *features =
- (VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR *)ext;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_UNIFORM_BUFFER_STANDARD_LAYOUT_FEATURES: {
+ VkPhysicalDeviceUniformBufferStandardLayoutFeatures *features =
+ (VkPhysicalDeviceUniformBufferStandardLayoutFeatures *)ext;
features->uniformBufferStandardLayout = true;
break;
}
features->indexTypeUint8 = pdevice->rad_info.chip_class >= GFX8;
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGELESS_FRAMEBUFFER_FEATURES_KHR: {
- VkPhysicalDeviceImagelessFramebufferFeaturesKHR *features =
- (VkPhysicalDeviceImagelessFramebufferFeaturesKHR *)ext;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGELESS_FRAMEBUFFER_FEATURES: {
+ VkPhysicalDeviceImagelessFramebufferFeatures *features =
+ (VkPhysicalDeviceImagelessFramebufferFeatures *)ext;
features->imagelessFramebuffer = true;
break;
}
features->texelBufferAlignment = true;
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TIMELINE_SEMAPHORE_FEATURES_KHR: {
- VkPhysicalDeviceTimelineSemaphoreFeaturesKHR *features =
- (VkPhysicalDeviceTimelineSemaphoreFeaturesKHR *) ext;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TIMELINE_SEMAPHORE_FEATURES: {
+ VkPhysicalDeviceTimelineSemaphoreFeatures *features =
+ (VkPhysicalDeviceTimelineSemaphoreFeatures *) ext;
features->timelineSemaphore = true;
break;
}
features->deviceCoherentMemory = pdevice->rad_info.has_l2_uncached;
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_SUBGROUP_EXTENDED_TYPES_FEATURES_KHR: {
- VkPhysicalDeviceShaderSubgroupExtendedTypesFeaturesKHR *features =
- (VkPhysicalDeviceShaderSubgroupExtendedTypesFeaturesKHR *)ext;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_SUBGROUP_EXTENDED_TYPES_FEATURES: {
+ VkPhysicalDeviceShaderSubgroupExtendedTypesFeatures *features =
+ (VkPhysicalDeviceShaderSubgroupExtendedTypesFeatures *)ext;
features->shaderSubgroupExtendedTypes = true;
break;
}
features->separateDepthStencilLayouts = true;
break;
}
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_FEATURES: {
+ VkPhysicalDeviceVulkan11Features *features =
+ (VkPhysicalDeviceVulkan11Features *)ext;
+ features->storageBuffer16BitAccess = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco;
+ features->uniformAndStorageBuffer16BitAccess = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco;
+ features->storagePushConstant16 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco;
+ features->storageInputOutput16 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco && LLVM_VERSION_MAJOR >= 9;
+ features->multiview = true;
+ features->multiviewGeometryShader = true;
+ features->multiviewTessellationShader = true;
+ features->variablePointersStorageBuffer = true;
+ features->variablePointers = true;
+ features->protectedMemory = false;
+ features->samplerYcbcrConversion = true;
+ features->shaderDrawParameters = true;
+ break;
+ }
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_2_FEATURES: {
+ VkPhysicalDeviceVulkan12Features *features =
+ (VkPhysicalDeviceVulkan12Features *)ext;
+ features->samplerMirrorClampToEdge = true;
+ features->drawIndirectCount = true;
+ features->storageBuffer8BitAccess = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco;
+ features->uniformAndStorageBuffer8BitAccess = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco;
+ features->storagePushConstant8 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco;
+ features->shaderBufferInt64Atomics = LLVM_VERSION_MAJOR >= 9;
+ features->shaderSharedInt64Atomics = LLVM_VERSION_MAJOR >= 9;
+ features->shaderFloat16 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_aco;
+ features->shaderInt8 = !pdevice->use_aco;
+ features->descriptorIndexing = true;
+ features->shaderInputAttachmentArrayDynamicIndexing = true;
+ features->shaderUniformTexelBufferArrayDynamicIndexing = true;
+ features->shaderStorageTexelBufferArrayDynamicIndexing = true;
+ features->shaderUniformBufferArrayNonUniformIndexing = true;
+ features->shaderSampledImageArrayNonUniformIndexing = true;
+ features->shaderStorageBufferArrayNonUniformIndexing = true;
+ features->shaderStorageImageArrayNonUniformIndexing = true;
+ features->shaderInputAttachmentArrayNonUniformIndexing = true;
+ features->shaderUniformTexelBufferArrayNonUniformIndexing = true;
+ features->shaderStorageTexelBufferArrayNonUniformIndexing = true;
+ features->descriptorBindingUniformBufferUpdateAfterBind = true;
+ features->descriptorBindingSampledImageUpdateAfterBind = true;
+ features->descriptorBindingStorageImageUpdateAfterBind = true;
+ features->descriptorBindingStorageBufferUpdateAfterBind = true;
+ features->descriptorBindingUniformTexelBufferUpdateAfterBind = true;
+ features->descriptorBindingStorageTexelBufferUpdateAfterBind = true;
+ features->descriptorBindingUpdateUnusedWhilePending = true;
+ features->descriptorBindingPartiallyBound = true;
+ features->descriptorBindingVariableDescriptorCount = true;
+ features->runtimeDescriptorArray = true;
+ features->samplerFilterMinmax = pdevice->rad_info.chip_class >= GFX7;
+ features->scalarBlockLayout = pdevice->rad_info.chip_class >= GFX7;
+ features->imagelessFramebuffer = true;
+ features->uniformBufferStandardLayout = true;
+ features->shaderSubgroupExtendedTypes = true;
+ features->separateDepthStencilLayouts = true;
+ features->hostQueryReset = true;
+ features->timelineSemaphore = pdevice->rad_info.has_syncobj_wait_for_submit;
+ features->bufferDeviceAddress = true;
+ features->bufferDeviceAddressCaptureReplay = false;
+ features->bufferDeviceAddressMultiDevice = false;
+ features->vulkanMemoryModel = false;
+ features->vulkanMemoryModelDeviceScope = false;
+ features->vulkanMemoryModelAvailabilityVisibilityChains = false;
+ features->shaderOutputViewportIndex = true;
+ features->shaderOutputLayer = true;
+ features->subgroupBroadcastDynamicId = true;
+ break;
+ }
default:
break;
}
.maxCombinedClipAndCullDistances = 8,
.discreteQueuePriorities = 2,
.pointSizeRange = { 0.0, 8192.0 },
- .lineWidthRange = { 0.0, 7.9921875 },
+ .lineWidthRange = { 0.0, 8192.0 },
.pointSizeGranularity = (1.0 / 8.0),
- .lineWidthGranularity = (1.0 / 128.0),
+ .lineWidthGranularity = (1.0 / 8.0),
.strictLines = false, /* FINISHME */
.standardSampleLocations = true,
.optimalBufferCopyOffsetAlignment = 128,
memcpy(pProperties->pipelineCacheUUID, pdevice->cache_uuid, VK_UUID_SIZE);
}
+static void
+radv_get_physical_device_properties_1_1(struct radv_physical_device *pdevice,
+ VkPhysicalDeviceVulkan11Properties *p)
+{
+ assert(p->sType == VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_PROPERTIES);
+
+ memcpy(p->deviceUUID, pdevice->device_uuid, VK_UUID_SIZE);
+ memcpy(p->driverUUID, pdevice->driver_uuid, VK_UUID_SIZE);
+ memset(p->deviceLUID, 0, VK_LUID_SIZE);
+ /* The LUID is for Windows. */
+ p->deviceLUIDValid = false;
+ p->deviceNodeMask = 0;
+
+ p->subgroupSize = RADV_SUBGROUP_SIZE;
+ p->subgroupSupportedStages = VK_SHADER_STAGE_ALL;
+ p->subgroupSupportedOperations = VK_SUBGROUP_FEATURE_BASIC_BIT |
+ VK_SUBGROUP_FEATURE_VOTE_BIT |
+ VK_SUBGROUP_FEATURE_ARITHMETIC_BIT |
+ VK_SUBGROUP_FEATURE_BALLOT_BIT |
+ VK_SUBGROUP_FEATURE_CLUSTERED_BIT |
+ VK_SUBGROUP_FEATURE_QUAD_BIT;
+
+ if (pdevice->rad_info.chip_class == GFX8 ||
+ pdevice->rad_info.chip_class == GFX9) {
+ p->subgroupSupportedOperations |= VK_SUBGROUP_FEATURE_SHUFFLE_BIT |
+ VK_SUBGROUP_FEATURE_SHUFFLE_RELATIVE_BIT;
+ }
+ p->subgroupQuadOperationsInAllStages = true;
+
+ p->pointClippingBehavior = VK_POINT_CLIPPING_BEHAVIOR_ALL_CLIP_PLANES;
+ p->maxMultiviewViewCount = MAX_VIEWS;
+ p->maxMultiviewInstanceIndex = INT_MAX;
+ p->protectedNoFault = false;
+ p->maxPerSetDescriptors = RADV_MAX_PER_SET_DESCRIPTORS;
+ p->maxMemoryAllocationSize = RADV_MAX_MEMORY_ALLOCATION_SIZE;
+}
+
+static void
+radv_get_physical_device_properties_1_2(struct radv_physical_device *pdevice,
+ VkPhysicalDeviceVulkan12Properties *p)
+{
+ assert(p->sType == VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_2_PROPERTIES);
+
+ p->driverID = VK_DRIVER_ID_MESA_RADV;
+ snprintf(p->driverName, VK_MAX_DRIVER_NAME_SIZE, "radv");
+ snprintf(p->driverInfo, VK_MAX_DRIVER_INFO_SIZE,
+ "Mesa " PACKAGE_VERSION MESA_GIT_SHA1
+ " (LLVM " MESA_LLVM_VERSION_STRING ")");
+ p->conformanceVersion = (VkConformanceVersion) {
+ .major = 1,
+ .minor = 2,
+ .subminor = 0,
+ .patch = 0,
+ };
+
+ /* On AMD hardware, denormals and rounding modes for fp16/fp64 are
+ * controlled by the same config register.
+ */
+ p->denormBehaviorIndependence = VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_32_BIT_ONLY_KHR;
+ p->roundingModeIndependence = VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_32_BIT_ONLY_KHR;
+
+ /* Do not allow both preserving and flushing denorms because different
+ * shaders in the same pipeline can have different settings and this
+ * won't work for merged shaders. To make it work, this requires LLVM
+ * support for changing the register. The same logic applies for the
+ * rounding modes because they are configured with the same config
+ * register. TODO: we can enable a lot of these for ACO when it
+ * supports all stages.
+ */
+ p->shaderDenormFlushToZeroFloat32 = true;
+ p->shaderDenormPreserveFloat32 = false;
+ p->shaderRoundingModeRTEFloat32 = true;
+ p->shaderRoundingModeRTZFloat32 = false;
+ p->shaderSignedZeroInfNanPreserveFloat32 = true;
+
+ p->shaderDenormFlushToZeroFloat16 = false;
+ p->shaderDenormPreserveFloat16 = pdevice->rad_info.chip_class >= GFX8;
+ p->shaderRoundingModeRTEFloat16 = pdevice->rad_info.chip_class >= GFX8;
+ p->shaderRoundingModeRTZFloat16 = false;
+ p->shaderSignedZeroInfNanPreserveFloat16 = pdevice->rad_info.chip_class >= GFX8;
+
+ p->shaderDenormFlushToZeroFloat64 = false;
+ p->shaderDenormPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
+ p->shaderRoundingModeRTEFloat64 = pdevice->rad_info.chip_class >= GFX8;
+ p->shaderRoundingModeRTZFloat64 = false;
+ p->shaderSignedZeroInfNanPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
+
+ p->maxUpdateAfterBindDescriptorsInAllPools = UINT32_MAX / 64;
+ p->shaderUniformBufferArrayNonUniformIndexingNative = false;
+ p->shaderSampledImageArrayNonUniformIndexingNative = false;
+ p->shaderStorageBufferArrayNonUniformIndexingNative = false;
+ p->shaderStorageImageArrayNonUniformIndexingNative = false;
+ p->shaderInputAttachmentArrayNonUniformIndexingNative = false;
+ p->robustBufferAccessUpdateAfterBind = false;
+ p->quadDivergentImplicitLod = false;
+
+ size_t max_descriptor_set_size = ((1ull << 31) - 16 * MAX_DYNAMIC_BUFFERS -
+ MAX_INLINE_UNIFORM_BLOCK_SIZE * MAX_INLINE_UNIFORM_BLOCK_COUNT) /
+ (32 /* uniform buffer, 32 due to potential space wasted on alignment */ +
+ 32 /* storage buffer, 32 due to potential space wasted on alignment */ +
+ 32 /* sampler, largest when combined with image */ +
+ 64 /* sampled image */ +
+ 64 /* storage image */);
+ p->maxPerStageDescriptorUpdateAfterBindSamplers = max_descriptor_set_size;
+ p->maxPerStageDescriptorUpdateAfterBindUniformBuffers = max_descriptor_set_size;
+ p->maxPerStageDescriptorUpdateAfterBindStorageBuffers = max_descriptor_set_size;
+ p->maxPerStageDescriptorUpdateAfterBindSampledImages = max_descriptor_set_size;
+ p->maxPerStageDescriptorUpdateAfterBindStorageImages = max_descriptor_set_size;
+ p->maxPerStageDescriptorUpdateAfterBindInputAttachments = max_descriptor_set_size;
+ p->maxPerStageUpdateAfterBindResources = max_descriptor_set_size;
+ p->maxDescriptorSetUpdateAfterBindSamplers = max_descriptor_set_size;
+ p->maxDescriptorSetUpdateAfterBindUniformBuffers = max_descriptor_set_size;
+ p->maxDescriptorSetUpdateAfterBindUniformBuffersDynamic = MAX_DYNAMIC_UNIFORM_BUFFERS;
+ p->maxDescriptorSetUpdateAfterBindStorageBuffers = max_descriptor_set_size;
+ p->maxDescriptorSetUpdateAfterBindStorageBuffersDynamic = MAX_DYNAMIC_STORAGE_BUFFERS;
+ p->maxDescriptorSetUpdateAfterBindSampledImages = max_descriptor_set_size;
+ p->maxDescriptorSetUpdateAfterBindStorageImages = max_descriptor_set_size;
+ p->maxDescriptorSetUpdateAfterBindInputAttachments = max_descriptor_set_size;
+
+ /* We support all of the depth resolve modes */
+ p->supportedDepthResolveModes = VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR |
+ VK_RESOLVE_MODE_AVERAGE_BIT_KHR |
+ VK_RESOLVE_MODE_MIN_BIT_KHR |
+ VK_RESOLVE_MODE_MAX_BIT_KHR;
+
+ /* Average doesn't make sense for stencil so we don't support that */
+ p->supportedStencilResolveModes = VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR |
+ VK_RESOLVE_MODE_MIN_BIT_KHR |
+ VK_RESOLVE_MODE_MAX_BIT_KHR;
+
+ p->independentResolveNone = true;
+ p->independentResolve = true;
+
+ /* GFX6-8 only support single channel min/max filter. */
+ p->filterMinmaxImageComponentMapping = pdevice->rad_info.chip_class >= GFX9;
+ p->filterMinmaxSingleComponentFormats = true;
+
+ p->maxTimelineSemaphoreValueDifference = UINT64_MAX;
+
+ p->framebufferIntegerColorSampleCounts = VK_SAMPLE_COUNT_1_BIT;
+}
+
void radv_GetPhysicalDeviceProperties2(
VkPhysicalDevice physicalDevice,
VkPhysicalDeviceProperties2 *pProperties)
RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
radv_GetPhysicalDeviceProperties(physicalDevice, &pProperties->properties);
+ VkPhysicalDeviceVulkan11Properties core_1_1 = {
+ .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_PROPERTIES,
+ };
+ radv_get_physical_device_properties_1_1(pdevice, &core_1_1);
+
+ VkPhysicalDeviceVulkan12Properties core_1_2 = {
+ .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_2_PROPERTIES,
+ };
+ radv_get_physical_device_properties_1_2(pdevice, &core_1_2);
+
+#define CORE_RENAMED_PROPERTY(major, minor, ext_property, core_property) \
+ memcpy(&properties->ext_property, &core_##major##_##minor.core_property, \
+ sizeof(core_##major##_##minor.core_property))
+
+#define CORE_PROPERTY(major, minor, property) \
+ CORE_RENAMED_PROPERTY(major, minor, property, property)
+
vk_foreach_struct(ext, pProperties->pNext) {
switch (ext->sType) {
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PUSH_DESCRIPTOR_PROPERTIES_KHR: {
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ID_PROPERTIES: {
VkPhysicalDeviceIDProperties *properties = (VkPhysicalDeviceIDProperties*)ext;
- memcpy(properties->driverUUID, pdevice->driver_uuid, VK_UUID_SIZE);
- memcpy(properties->deviceUUID, pdevice->device_uuid, VK_UUID_SIZE);
- properties->deviceLUIDValid = false;
+ CORE_PROPERTY(1, 1, deviceUUID);
+ CORE_PROPERTY(1, 1, driverUUID);
+ CORE_PROPERTY(1, 1, deviceLUID);
+ CORE_PROPERTY(1, 1, deviceLUIDValid);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES: {
VkPhysicalDeviceMultiviewProperties *properties = (VkPhysicalDeviceMultiviewProperties*)ext;
- properties->maxMultiviewViewCount = MAX_VIEWS;
- properties->maxMultiviewInstanceIndex = INT_MAX;
+ CORE_PROPERTY(1, 1, maxMultiviewViewCount);
+ CORE_PROPERTY(1, 1, maxMultiviewInstanceIndex);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_POINT_CLIPPING_PROPERTIES: {
VkPhysicalDevicePointClippingProperties *properties =
(VkPhysicalDevicePointClippingProperties*)ext;
- properties->pointClippingBehavior = VK_POINT_CLIPPING_BEHAVIOR_ALL_CLIP_PLANES;
+ CORE_PROPERTY(1, 1, pointClippingBehavior);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DISCARD_RECTANGLE_PROPERTIES_EXT: {
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SUBGROUP_PROPERTIES: {
VkPhysicalDeviceSubgroupProperties *properties =
(VkPhysicalDeviceSubgroupProperties*)ext;
- properties->subgroupSize = RADV_SUBGROUP_SIZE;
- properties->supportedStages = VK_SHADER_STAGE_ALL;
- properties->supportedOperations =
- VK_SUBGROUP_FEATURE_BASIC_BIT |
- VK_SUBGROUP_FEATURE_VOTE_BIT |
- VK_SUBGROUP_FEATURE_ARITHMETIC_BIT |
- VK_SUBGROUP_FEATURE_BALLOT_BIT |
- VK_SUBGROUP_FEATURE_CLUSTERED_BIT |
- VK_SUBGROUP_FEATURE_QUAD_BIT;
- if (pdevice->rad_info.chip_class == GFX8 ||
- pdevice->rad_info.chip_class == GFX9) {
- properties->supportedOperations |=
- VK_SUBGROUP_FEATURE_SHUFFLE_BIT |
- VK_SUBGROUP_FEATURE_SHUFFLE_RELATIVE_BIT;
- }
- properties->quadOperationsInAllStages = true;
+ CORE_PROPERTY(1, 1, subgroupSize);
+ CORE_RENAMED_PROPERTY(1, 1, supportedStages,
+ subgroupSupportedStages);
+ CORE_RENAMED_PROPERTY(1, 1, supportedOperations,
+ subgroupSupportedOperations);
+ CORE_RENAMED_PROPERTY(1, 1, quadOperationsInAllStages,
+ subgroupQuadOperationsInAllStages);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MAINTENANCE_3_PROPERTIES: {
VkPhysicalDeviceMaintenance3Properties *properties =
(VkPhysicalDeviceMaintenance3Properties*)ext;
- properties->maxPerSetDescriptors = RADV_MAX_PER_SET_DESCRIPTORS;
- properties->maxMemoryAllocationSize = RADV_MAX_MEMORY_ALLOCATION_SIZE;
+ CORE_PROPERTY(1, 1, maxPerSetDescriptors);
+ CORE_PROPERTY(1, 1, maxMemoryAllocationSize);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_FILTER_MINMAX_PROPERTIES: {
VkPhysicalDeviceSamplerFilterMinmaxProperties *properties =
(VkPhysicalDeviceSamplerFilterMinmaxProperties *)ext;
- /* GFX6-8 only support single channel min/max filter. */
- properties->filterMinmaxImageComponentMapping = pdevice->rad_info.chip_class >= GFX9;
- properties->filterMinmaxSingleComponentFormats = true;
+ CORE_PROPERTY(1, 2, filterMinmaxImageComponentMapping);
+ CORE_PROPERTY(1, 2, filterMinmaxSingleComponentFormats);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_CORE_PROPERTIES_AMD: {
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DESCRIPTOR_INDEXING_PROPERTIES: {
VkPhysicalDeviceDescriptorIndexingProperties *properties =
(VkPhysicalDeviceDescriptorIndexingProperties*)ext;
- properties->maxUpdateAfterBindDescriptorsInAllPools = UINT32_MAX / 64;
- properties->shaderUniformBufferArrayNonUniformIndexingNative = false;
- properties->shaderSampledImageArrayNonUniformIndexingNative = false;
- properties->shaderStorageBufferArrayNonUniformIndexingNative = false;
- properties->shaderStorageImageArrayNonUniformIndexingNative = false;
- properties->shaderInputAttachmentArrayNonUniformIndexingNative = false;
- properties->robustBufferAccessUpdateAfterBind = false;
- properties->quadDivergentImplicitLod = false;
-
- size_t max_descriptor_set_size = radv_max_descriptor_set_size();
- properties->maxPerStageDescriptorUpdateAfterBindSamplers = max_descriptor_set_size;
- properties->maxPerStageDescriptorUpdateAfterBindUniformBuffers = max_descriptor_set_size;
- properties->maxPerStageDescriptorUpdateAfterBindStorageBuffers = max_descriptor_set_size;
- properties->maxPerStageDescriptorUpdateAfterBindSampledImages = max_descriptor_set_size;
- properties->maxPerStageDescriptorUpdateAfterBindStorageImages = max_descriptor_set_size;
- properties->maxPerStageDescriptorUpdateAfterBindInputAttachments = max_descriptor_set_size;
- properties->maxPerStageUpdateAfterBindResources = max_descriptor_set_size;
- properties->maxDescriptorSetUpdateAfterBindSamplers = max_descriptor_set_size;
- properties->maxDescriptorSetUpdateAfterBindUniformBuffers = max_descriptor_set_size;
- properties->maxDescriptorSetUpdateAfterBindUniformBuffersDynamic = MAX_DYNAMIC_UNIFORM_BUFFERS;
- properties->maxDescriptorSetUpdateAfterBindStorageBuffers = max_descriptor_set_size;
- properties->maxDescriptorSetUpdateAfterBindStorageBuffersDynamic = MAX_DYNAMIC_STORAGE_BUFFERS;
- properties->maxDescriptorSetUpdateAfterBindSampledImages = max_descriptor_set_size;
- properties->maxDescriptorSetUpdateAfterBindStorageImages = max_descriptor_set_size;
- properties->maxDescriptorSetUpdateAfterBindInputAttachments = max_descriptor_set_size;
+ CORE_PROPERTY(1, 2, maxUpdateAfterBindDescriptorsInAllPools);
+ CORE_PROPERTY(1, 2, shaderUniformBufferArrayNonUniformIndexingNative);
+ CORE_PROPERTY(1, 2, shaderSampledImageArrayNonUniformIndexingNative);
+ CORE_PROPERTY(1, 2, shaderStorageBufferArrayNonUniformIndexingNative);
+ CORE_PROPERTY(1, 2, shaderStorageImageArrayNonUniformIndexingNative);
+ CORE_PROPERTY(1, 2, shaderInputAttachmentArrayNonUniformIndexingNative);
+ CORE_PROPERTY(1, 2, robustBufferAccessUpdateAfterBind);
+ CORE_PROPERTY(1, 2, quadDivergentImplicitLod);
+ CORE_PROPERTY(1, 2, maxPerStageDescriptorUpdateAfterBindSamplers);
+ CORE_PROPERTY(1, 2, maxPerStageDescriptorUpdateAfterBindUniformBuffers);
+ CORE_PROPERTY(1, 2, maxPerStageDescriptorUpdateAfterBindStorageBuffers);
+ CORE_PROPERTY(1, 2, maxPerStageDescriptorUpdateAfterBindSampledImages);
+ CORE_PROPERTY(1, 2, maxPerStageDescriptorUpdateAfterBindStorageImages);
+ CORE_PROPERTY(1, 2, maxPerStageDescriptorUpdateAfterBindInputAttachments);
+ CORE_PROPERTY(1, 2, maxPerStageUpdateAfterBindResources);
+ CORE_PROPERTY(1, 2, maxDescriptorSetUpdateAfterBindSamplers);
+ CORE_PROPERTY(1, 2, maxDescriptorSetUpdateAfterBindUniformBuffers);
+ CORE_PROPERTY(1, 2, maxDescriptorSetUpdateAfterBindUniformBuffersDynamic);
+ CORE_PROPERTY(1, 2, maxDescriptorSetUpdateAfterBindStorageBuffers);
+ CORE_PROPERTY(1, 2, maxDescriptorSetUpdateAfterBindStorageBuffersDynamic);
+ CORE_PROPERTY(1, 2, maxDescriptorSetUpdateAfterBindSampledImages);
+ CORE_PROPERTY(1, 2, maxDescriptorSetUpdateAfterBindStorageImages);
+ CORE_PROPERTY(1, 2, maxDescriptorSetUpdateAfterBindInputAttachments);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PROTECTED_MEMORY_PROPERTIES: {
VkPhysicalDeviceProtectedMemoryProperties *properties =
(VkPhysicalDeviceProtectedMemoryProperties *)ext;
- properties->protectedNoFault = false;
+ CORE_PROPERTY(1, 1, protectedNoFault);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CONSERVATIVE_RASTERIZATION_PROPERTIES_EXT: {
properties->pciFunction = pdevice->bus_info.func;
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DRIVER_PROPERTIES_KHR: {
- VkPhysicalDeviceDriverPropertiesKHR *driver_props =
- (VkPhysicalDeviceDriverPropertiesKHR *) ext;
-
- driver_props->driverID = VK_DRIVER_ID_MESA_RADV_KHR;
- snprintf(driver_props->driverName, VK_MAX_DRIVER_NAME_SIZE_KHR, "radv");
- snprintf(driver_props->driverInfo, VK_MAX_DRIVER_INFO_SIZE_KHR,
- "Mesa " PACKAGE_VERSION MESA_GIT_SHA1
- " (LLVM " MESA_LLVM_VERSION_STRING ")");
-
- driver_props->conformanceVersion = (VkConformanceVersionKHR) {
- .major = 1,
- .minor = 1,
- .subminor = 2,
- .patch = 0,
- };
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DRIVER_PROPERTIES: {
+ VkPhysicalDeviceDriverProperties *properties =
+ (VkPhysicalDeviceDriverProperties *) ext;
+ CORE_PROPERTY(1, 2, driverID);
+ CORE_PROPERTY(1, 2, driverName);
+ CORE_PROPERTY(1, 2, driverInfo);
+ CORE_PROPERTY(1, 2, conformanceVersion);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_PROPERTIES_EXT: {
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DEPTH_STENCIL_RESOLVE_PROPERTIES: {
VkPhysicalDeviceDepthStencilResolveProperties *properties =
(VkPhysicalDeviceDepthStencilResolveProperties *)ext;
-
- /* We support all of the depth resolve modes */
- properties->supportedDepthResolveModes =
- VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR |
- VK_RESOLVE_MODE_AVERAGE_BIT_KHR |
- VK_RESOLVE_MODE_MIN_BIT_KHR |
- VK_RESOLVE_MODE_MAX_BIT_KHR;
-
- /* Average doesn't make sense for stencil so we don't support that */
- properties->supportedStencilResolveModes =
- VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR |
- VK_RESOLVE_MODE_MIN_BIT_KHR |
- VK_RESOLVE_MODE_MAX_BIT_KHR;
-
- properties->independentResolveNone = true;
- properties->independentResolve = true;
+ CORE_PROPERTY(1, 2, supportedDepthResolveModes);
+ CORE_PROPERTY(1, 2, supportedStencilResolveModes);
+ CORE_PROPERTY(1, 2, independentResolveNone);
+ CORE_PROPERTY(1, 2, independentResolve);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TEXEL_BUFFER_ALIGNMENT_PROPERTIES_EXT: {
properties->uniformTexelBufferOffsetSingleTexelAlignment = true;
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT_CONTROLS_PROPERTIES_KHR : {
- VkPhysicalDeviceFloatControlsPropertiesKHR *properties =
- (VkPhysicalDeviceFloatControlsPropertiesKHR *)ext;
-
- /* On AMD hardware, denormals and rounding modes for
- * fp16/fp64 are controlled by the same config
- * register.
- */
- properties->denormBehaviorIndependence = VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_32_BIT_ONLY_KHR;
- properties->roundingModeIndependence = VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_32_BIT_ONLY_KHR;
-
- /* Do not allow both preserving and flushing denorms
- * because different shaders in the same pipeline can
- * have different settings and this won't work for
- * merged shaders. To make it work, this requires LLVM
- * support for changing the register. The same logic
- * applies for the rounding modes because they are
- * configured with the same config register.
- * TODO: we can enable a lot of these for ACO when it
- * supports all stages
- */
- properties->shaderDenormFlushToZeroFloat32 = true;
- properties->shaderDenormPreserveFloat32 = false;
- properties->shaderRoundingModeRTEFloat32 = true;
- properties->shaderRoundingModeRTZFloat32 = false;
- properties->shaderSignedZeroInfNanPreserveFloat32 = true;
-
- properties->shaderDenormFlushToZeroFloat16 = false;
- properties->shaderDenormPreserveFloat16 = pdevice->rad_info.chip_class >= GFX8;
- properties->shaderRoundingModeRTEFloat16 = pdevice->rad_info.chip_class >= GFX8;
- properties->shaderRoundingModeRTZFloat16 = false;
- properties->shaderSignedZeroInfNanPreserveFloat16 = pdevice->rad_info.chip_class >= GFX8;
-
- properties->shaderDenormFlushToZeroFloat64 = false;
- properties->shaderDenormPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
- properties->shaderRoundingModeRTEFloat64 = pdevice->rad_info.chip_class >= GFX8;
- properties->shaderRoundingModeRTZFloat64 = false;
- properties->shaderSignedZeroInfNanPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT_CONTROLS_PROPERTIES : {
+ VkPhysicalDeviceFloatControlsProperties *properties =
+ (VkPhysicalDeviceFloatControlsProperties *)ext;
+ CORE_PROPERTY(1, 2, denormBehaviorIndependence);
+ CORE_PROPERTY(1, 2, roundingModeIndependence);
+ CORE_PROPERTY(1, 2, shaderDenormFlushToZeroFloat16);
+ CORE_PROPERTY(1, 2, shaderDenormPreserveFloat16);
+ CORE_PROPERTY(1, 2, shaderRoundingModeRTEFloat16);
+ CORE_PROPERTY(1, 2, shaderRoundingModeRTZFloat16);
+ CORE_PROPERTY(1, 2, shaderSignedZeroInfNanPreserveFloat16);
+ CORE_PROPERTY(1, 2, shaderDenormFlushToZeroFloat32);
+ CORE_PROPERTY(1, 2, shaderDenormPreserveFloat32);
+ CORE_PROPERTY(1, 2, shaderRoundingModeRTEFloat32);
+ CORE_PROPERTY(1, 2, shaderRoundingModeRTZFloat32);
+ CORE_PROPERTY(1, 2, shaderSignedZeroInfNanPreserveFloat32);
+ CORE_PROPERTY(1, 2, shaderDenormFlushToZeroFloat64);
+ CORE_PROPERTY(1, 2, shaderDenormPreserveFloat64);
+ CORE_PROPERTY(1, 2, shaderRoundingModeRTEFloat64);
+ CORE_PROPERTY(1, 2, shaderRoundingModeRTZFloat64);
+ CORE_PROPERTY(1, 2, shaderSignedZeroInfNanPreserveFloat64);
break;
}
- case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TIMELINE_SEMAPHORE_PROPERTIES_KHR: {
- VkPhysicalDeviceTimelineSemaphorePropertiesKHR *props =
- (VkPhysicalDeviceTimelineSemaphorePropertiesKHR *) ext;
- props->maxTimelineSemaphoreValueDifference = UINT64_MAX;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TIMELINE_SEMAPHORE_PROPERTIES: {
+ VkPhysicalDeviceTimelineSemaphoreProperties *properties =
+ (VkPhysicalDeviceTimelineSemaphoreProperties *) ext;
+ CORE_PROPERTY(1, 2, maxTimelineSemaphoreValueDifference);
break;
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SUBGROUP_SIZE_CONTROL_PROPERTIES_EXT: {
}
break;
}
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_PROPERTIES:
+ radv_get_physical_device_properties_1_1(pdevice, (void *)ext);
+ break;
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_2_PROPERTIES:
+ radv_get_physical_device_properties_1_2(pdevice, (void *)ext);
+ break;
default:
break;
}
uint32_t gsvs_ring_size,
bool needs_tess_rings,
bool needs_gds,
+ bool needs_gds_oa,
bool needs_sample_positions,
struct radeon_cmdbuf **initial_full_flush_preamble_cs,
struct radeon_cmdbuf **initial_preamble_cs,
struct radeon_winsys_bo *gds_bo = NULL;
struct radeon_winsys_bo *gds_oa_bo = NULL;
struct radeon_cmdbuf *dest_cs[3] = {0};
- bool add_tess_rings = false, add_gds = false, add_sample_positions = false;
+ bool add_tess_rings = false, add_gds = false, add_gds_oa = false, add_sample_positions = false;
unsigned tess_factor_ring_size = 0, tess_offchip_ring_size = 0;
unsigned max_offchip_buffers;
unsigned hs_offchip_param = 0;
if (needs_gds)
add_gds = true;
}
+ if (!queue->has_gds_oa) {
+ if (needs_gds_oa)
+ add_gds_oa = true;
+ }
if (!queue->has_sample_positions) {
if (needs_sample_positions)
add_sample_positions = true;
compute_scratch_waves <= queue->compute_scratch_waves &&
esgs_ring_size <= queue->esgs_ring_size &&
gsvs_ring_size <= queue->gsvs_ring_size &&
- !add_tess_rings && !add_gds && !add_sample_positions &&
+ !add_tess_rings && !add_gds && !add_gds_oa && !add_sample_positions &&
queue->initial_preamble_cs) {
*initial_full_flush_preamble_cs = queue->initial_full_flush_preamble_cs;
*initial_preamble_cs = queue->initial_preamble_cs;
*continue_preamble_cs = queue->continue_preamble_cs;
if (!scratch_size_per_wave && !compute_scratch_size_per_wave &&
!esgs_ring_size && !gsvs_ring_size && !needs_tess_rings &&
- !needs_gds && !needs_sample_positions)
+ !needs_gds && !needs_gds_oa && !needs_sample_positions)
*continue_preamble_cs = NULL;
return VK_SUCCESS;
}
RADV_BO_PRIORITY_SCRATCH);
if (!gds_bo)
goto fail;
+ } else {
+ gds_bo = queue->gds_bo;
+ }
+
+ if (add_gds_oa) {
+ assert(queue->device->physical_device->rad_info.chip_class >= GFX10);
gds_oa_bo = queue->device->ws->buffer_create(queue->device->ws,
4, 1,
if (!gds_oa_bo)
goto fail;
} else {
- gds_bo = queue->gds_bo;
gds_oa_bo = queue->gds_oa_bo;
}
queue->has_gds = true;
}
- if (gds_oa_bo != queue->gds_oa_bo)
+ if (gds_oa_bo != queue->gds_oa_bo) {
queue->gds_oa_bo = gds_oa_bo;
+ queue->has_gds_oa = true;
+ }
if (descriptor_bo != queue->descriptor_bo) {
if (queue->descriptor_bo)
uint32_t esgs_ring_size = 0, gsvs_ring_size = 0;
bool tess_rings_needed = false;
bool gds_needed = false;
+ bool gds_oa_needed = false;
bool sample_positions_needed = false;
for (uint32_t j = 0; j < cmd_buffer_count; j++) {
gsvs_ring_size = MAX2(gsvs_ring_size, cmd_buffer->gsvs_ring_size_needed);
tess_rings_needed |= cmd_buffer->tess_rings_needed;
gds_needed |= cmd_buffer->gds_needed;
+ gds_oa_needed |= cmd_buffer->gds_oa_needed;
sample_positions_needed |= cmd_buffer->sample_positions_needed;
}
return radv_get_preamble_cs(queue, scratch_size_per_wave, waves_wanted,
compute_scratch_size_per_wave, compute_waves_wanted,
esgs_ring_size, gsvs_ring_size, tess_rings_needed,
- gds_needed, sample_positions_needed,
+ gds_needed, gds_oa_needed, sample_positions_needed,
initial_full_flush_preamble_cs,
initial_preamble_cs, continue_preamble_cs);
}
wait_dst_stage_mask |= pSubmits[i].pWaitDstStageMask[j];
}
- const VkTimelineSemaphoreSubmitInfoKHR *timeline_info =
- vk_find_struct_const(pSubmits[i].pNext, TIMELINE_SEMAPHORE_SUBMIT_INFO_KHR);
+ const VkTimelineSemaphoreSubmitInfo *timeline_info =
+ vk_find_struct_const(pSubmits[i].pNext, TIMELINE_SEMAPHORE_SUBMIT_INFO);
result = radv_queue_submit(queue, &(struct radv_queue_submission) {
.cmd_buffers = pSubmits[i].pCommandBuffers,
struct radeon_bo_metadata metadata;
if (memory->image) {
- radv_init_metadata(device, memory->image, &metadata);
+ if (memory->image->tiling != VK_IMAGE_TILING_LINEAR)
+ radv_init_metadata(device, memory->image, &metadata);
device->ws->buffer_set_metadata(memory->bo, &metadata);
}
fail:
radv_free_memory(device, pAllocator,mem);
- vk_free2(&device->alloc, pAllocator, mem);
return result;
}
{
radv_GetBufferMemoryRequirements(device, pInfo->buffer,
&pMemoryRequirements->memoryRequirements);
- RADV_FROM_HANDLE(radv_buffer, buffer, pInfo->buffer);
vk_foreach_struct(ext, pMemoryRequirements->pNext) {
switch (ext->sType) {
case VK_STRUCTURE_TYPE_MEMORY_DEDICATED_REQUIREMENTS: {
VkMemoryDedicatedRequirements *req =
(VkMemoryDedicatedRequirements *) ext;
- req->requiresDedicatedAllocation = buffer->shareable;
+ req->requiresDedicatedAllocation = false;
req->prefersDedicatedAllocation = req->requiresDedicatedAllocation;
break;
}
case VK_STRUCTURE_TYPE_MEMORY_DEDICATED_REQUIREMENTS: {
VkMemoryDedicatedRequirements *req =
(VkMemoryDedicatedRequirements *) ext;
- req->requiresDedicatedAllocation = image->shareable;
+ req->requiresDedicatedAllocation = image->shareable &&
+ image->tiling != VK_IMAGE_TILING_LINEAR;
req->prefersDedicatedAllocation = req->requiresDedicatedAllocation;
break;
}
if (i != fence_idx && !radv_sparse_bind_has_effects(pBindInfo + i))
continue;
- const VkTimelineSemaphoreSubmitInfoKHR *timeline_info =
- vk_find_struct_const(pBindInfo[i].pNext, TIMELINE_SEMAPHORE_SUBMIT_INFO_KHR);
+ const VkTimelineSemaphoreSubmitInfo *timeline_info =
+ vk_find_struct_const(pBindInfo[i].pNext, TIMELINE_SEMAPHORE_SUBMIT_INFO);
VkResult result = radv_queue_submit(queue, &(struct radv_queue_submission) {
.buffer_binds = pBindInfo[i].pBufferBinds,
static VkSemaphoreTypeKHR
radv_get_semaphore_type(const void *pNext, uint64_t *initial_value)
{
- const VkSemaphoreTypeCreateInfoKHR *type_info =
- vk_find_struct_const(pNext, SEMAPHORE_TYPE_CREATE_INFO_KHR);
+ const VkSemaphoreTypeCreateInfo *type_info =
+ vk_find_struct_const(pNext, SEMAPHORE_TYPE_CREATE_INFO);
if (!type_info)
- return VK_SEMAPHORE_TYPE_BINARY_KHR;
+ return VK_SEMAPHORE_TYPE_BINARY;
if (initial_value)
*initial_value = type_info->initialValue;
sem->temporary.kind = RADV_SEMAPHORE_NONE;
sem->permanent.kind = RADV_SEMAPHORE_NONE;
- if (type == VK_SEMAPHORE_TYPE_TIMELINE_KHR) {
+ if (type == VK_SEMAPHORE_TYPE_TIMELINE) {
radv_create_timeline(&sem->permanent.timeline, initial_value);
sem->permanent.kind = RADV_SEMAPHORE_TIMELINE;
} else if (device->always_use_syncobj || handleTypes) {
}
VkResult
-radv_GetSemaphoreCounterValueKHR(VkDevice _device,
- VkSemaphore _semaphore,
- uint64_t* pValue)
+radv_GetSemaphoreCounterValue(VkDevice _device,
+ VkSemaphore _semaphore,
+ uint64_t* pValue)
{
RADV_FROM_HANDLE(radv_device, device, _device);
RADV_FROM_HANDLE(radv_semaphore, semaphore, _semaphore);
static VkResult
radv_wait_timelines(struct radv_device *device,
- const VkSemaphoreWaitInfoKHR* pWaitInfo,
+ const VkSemaphoreWaitInfo* pWaitInfo,
uint64_t abs_timeout)
{
if ((pWaitInfo->flags & VK_SEMAPHORE_WAIT_ANY_BIT_KHR) && pWaitInfo->semaphoreCount > 1) {
return VK_SUCCESS;
}
VkResult
-radv_WaitSemaphoresKHR(VkDevice _device,
- const VkSemaphoreWaitInfoKHR* pWaitInfo,
- uint64_t timeout)
+radv_WaitSemaphores(VkDevice _device,
+ const VkSemaphoreWaitInfo* pWaitInfo,
+ uint64_t timeout)
{
RADV_FROM_HANDLE(radv_device, device, _device);
uint64_t abs_timeout = radv_get_absolute_timeout(timeout);
}
VkResult
-radv_SignalSemaphoreKHR(VkDevice _device,
- const VkSemaphoreSignalInfoKHR* pSignalInfo)
+radv_SignalSemaphore(VkDevice _device,
+ const VkSemaphoreSignalInfo* pSignalInfo)
{
RADV_FROM_HANDLE(radv_device, device, _device);
RADV_FROM_HANDLE(radv_semaphore, semaphore, pSignalInfo->semaphore);
{
RADV_FROM_HANDLE(radv_device, device, _device);
struct radv_framebuffer *framebuffer;
- const VkFramebufferAttachmentsCreateInfoKHR *imageless_create_info =
+ const VkFramebufferAttachmentsCreateInfo *imageless_create_info =
vk_find_struct_const(pCreateInfo->pNext,
- FRAMEBUFFER_ATTACHMENTS_CREATE_INFO_KHR);
+ FRAMEBUFFER_ATTACHMENTS_CREATE_INFO);
assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
framebuffer->layers = pCreateInfo->layers;
if (imageless_create_info) {
for (unsigned i = 0; i < imageless_create_info->attachmentImageInfoCount; ++i) {
- const VkFramebufferAttachmentImageInfoKHR *attachment =
+ const VkFramebufferAttachmentImageInfo *attachment =
imageless_create_info->pAttachmentImageInfos + i;
framebuffer->width = MIN2(framebuffer->width, attachment->width);
framebuffer->height = MIN2(framebuffer->height, attachment->height);
RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
VkSemaphoreTypeKHR type = radv_get_semaphore_type(pExternalSemaphoreInfo->pNext, NULL);
- if (type == VK_SEMAPHORE_TYPE_TIMELINE_KHR) {
+ if (type == VK_SEMAPHORE_TYPE_TIMELINE) {
pExternalSemaphoreProperties->exportFromImportedHandleTypes = 0;
pExternalSemaphoreProperties->compatibleHandleTypes = 0;
pExternalSemaphoreProperties->externalSemaphoreFeatures = 0;
projects / mesa.git / blobdiff