#include <string.h>
#include <unistd.h>
#include <fcntl.h>
+#include "radv_debug.h"
#include "radv_private.h"
#include "radv_cs.h"
#include "util/disk_cache.h"
}
static void
-radv_get_device_uuid(drmDevicePtr device, void *uuid) {
- memset(uuid, 0, VK_UUID_SIZE);
- memcpy((char*)uuid + 0, &device->businfo.pci->domain, 2);
- memcpy((char*)uuid + 2, &device->businfo.pci->bus, 1);
- memcpy((char*)uuid + 3, &device->businfo.pci->dev, 1);
- memcpy((char*)uuid + 4, &device->businfo.pci->func, 1);
+radv_get_driver_uuid(void *uuid)
+{
+ ac_compute_driver_uuid(uuid, VK_UUID_SIZE);
+}
+
+static void
+radv_get_device_uuid(struct radeon_info *info, void *uuid)
+{
+ ac_compute_device_uuid(info, uuid, VK_UUID_SIZE);
}
static const VkExtensionProperties instance_extensions[] = {
.extensionName = VK_KHR_EXTERNAL_SEMAPHORE_FD_EXTENSION_NAME,
.specVersion = 1,
},
+ {
+ .extensionName = VK_KHX_MULTIVIEW_EXTENSION_NAME,
+ .specVersion = 1,
+ },
};
static VkResult
goto fail;
}
- if (radv_device_get_cache_uuid(device->rad_info.family, device->uuid)) {
+ if (radv_device_get_cache_uuid(device->rad_info.family, device->cache_uuid)) {
radv_finish_wsi(device);
device->ws->destroy(device->ws);
result = vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n");
device->name = get_chip_name(device->rad_info.family);
- radv_get_device_uuid(drm_device, device->device_uuid);
+ radv_get_driver_uuid(&device->device_uuid);
+ radv_get_device_uuid(&device->rad_info, &device->device_uuid);
if (device->rad_info.family == CHIP_STONEY ||
device->rad_info.chip_class >= GFX9) {
features->variablePointers = false;
break;
}
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES_KHX: {
+ VkPhysicalDeviceMultiviewFeaturesKHX *features = (VkPhysicalDeviceMultiviewFeaturesKHX*)ext;
+ features->multiview = true;
+ features->multiviewGeometryShader = true;
+ features->multiviewTessellationShader = true;
+ break;
+ }
default:
break;
}
};
strcpy(pProperties->deviceName, pdevice->name);
- memcpy(pProperties->pipelineCacheUUID, pdevice->uuid, VK_UUID_SIZE);
+ memcpy(pProperties->pipelineCacheUUID, pdevice->cache_uuid, VK_UUID_SIZE);
}
void radv_GetPhysicalDeviceProperties2KHR(
}
case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ID_PROPERTIES_KHR: {
VkPhysicalDeviceIDPropertiesKHR *properties = (VkPhysicalDeviceIDPropertiesKHR*)ext;
- radv_device_get_cache_uuid(0, properties->driverUUID);
+ memcpy(properties->driverUUID, pdevice->driver_uuid, VK_UUID_SIZE);
memcpy(properties->deviceUUID, pdevice->device_uuid, VK_UUID_SIZE);
properties->deviceLUIDValid = false;
break;
}
+ case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES_KHX: {
+ VkPhysicalDeviceMultiviewPropertiesKHX *properties = (VkPhysicalDeviceMultiviewPropertiesKHX*)ext;
+ properties->maxMultiviewViewCount = MAX_VIEWS;
+ properties->maxMultiviewInstanceIndex = INT_MAX;
+ break;
+ }
default:
break;
}
};
STATIC_ASSERT(RADV_MEM_HEAP_COUNT <= VK_MAX_MEMORY_HEAPS);
+ uint64_t visible_vram_size = MIN2(physical_device->rad_info.vram_size,
+ physical_device->rad_info.vram_vis_size);
pMemoryProperties->memoryHeapCount = RADV_MEM_HEAP_COUNT;
pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_VRAM] = (VkMemoryHeap) {
.size = physical_device->rad_info.vram_size -
- physical_device->rad_info.vram_vis_size,
+ visible_vram_size,
.flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
};
pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_VRAM_CPU_ACCESS] = (VkMemoryHeap) {
- .size = physical_device->rad_info.vram_vis_size,
+ .size = visible_vram_size,
.flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
};
pMemoryProperties->memoryHeaps[RADV_MEM_HEAP_GTT] = (VkMemoryHeap) {
else
device->alloc = physical_device->instance->alloc;
+ mtx_init(&device->shader_slab_mutex, mtx_plain);
+ list_inithead(&device->shader_slabs);
+
for (unsigned i = 0; i < pCreateInfo->queueCreateInfoCount; i++) {
const VkDeviceQueueCreateInfo *queue_create = &pCreateInfo->pQueueCreateInfos[i];
uint32_t qfi = queue_create->queueFamilyIndex;
}
if (getenv("RADV_TRACE_FILE")) {
- device->trace_bo = device->ws->buffer_create(device->ws, 4096, 8,
- RADEON_DOMAIN_VRAM, RADEON_FLAG_CPU_ACCESS);
- if (!device->trace_bo)
- goto fail;
-
- device->trace_id_ptr = device->ws->buffer_map(device->trace_bo);
- if (!device->trace_id_ptr)
+ if (!radv_init_trace(device))
goto fail;
}
VkPipelineCache pc = radv_pipeline_cache_to_handle(device->mem_cache);
radv_DestroyPipelineCache(radv_device_to_handle(device), pc, NULL);
+ radv_destroy_shader_slabs(device);
+
vk_free(&device->alloc, device);
}
*pQueue = radv_queue_to_handle(&device->queues[queueFamilyIndex][queueIndex]);
}
-static void radv_dump_trace(struct radv_device *device,
- struct radeon_winsys_cs *cs)
-{
- const char *filename = getenv("RADV_TRACE_FILE");
- FILE *f = fopen(filename, "w");
- if (!f) {
- fprintf(stderr, "Failed to write trace dump to %s\n", filename);
- return;
- }
-
- fprintf(f, "Trace ID: %x\n", *device->trace_id_ptr);
- device->ws->cs_dump(cs, f, *device->trace_id_ptr);
- fclose(f);
-}
-
static void
fill_geom_tess_rings(struct radv_queue *queue,
uint32_t *map,
va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
+ cb->cb_color_base = va >> 8;
+
if (device->physical_device->rad_info.chip_class >= GFX9) {
struct gfx9_surf_meta_flags meta;
if (iview->image->dcc_offset)
S_028C74_RB_ALIGNED(meta.rb_aligned) |
S_028C74_PIPE_ALIGNED(meta.pipe_aligned);
- va += iview->image->surface.u.gfx9.surf_offset >> 8;
+ cb->cb_color_base += iview->image->surface.u.gfx9.surf_offset >> 8;
+ cb->cb_color_base |= iview->image->surface.tile_swizzle;
} else {
const struct legacy_surf_level *level_info = &surf->u.legacy.level[iview->base_mip];
unsigned pitch_tile_max, slice_tile_max, tile_mode_index;
- va += level_info->offset;
+ cb->cb_color_base += level_info->offset >> 8;
+ if (level_info->mode == RADEON_SURF_MODE_2D)
+ cb->cb_color_base |= iview->image->surface.tile_swizzle;
pitch_tile_max = level_info->nblk_x / 8 - 1;
slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1;
}
}
- cb->cb_color_base = va >> 8;
- if (device->physical_device->rad_info.chip_class < GFX9)
- cb->cb_color_base |= iview->image->surface.u.legacy.tile_swizzle;
/* CMASK variables */
va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
va += iview->image->cmask.offset;
va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
va += iview->image->dcc_offset;
cb->cb_dcc_base = va >> 8;
- if (device->physical_device->rad_info.chip_class < GFX9)
- cb->cb_dcc_base |= iview->image->surface.u.legacy.tile_swizzle;
+ cb->cb_dcc_base |= iview->image->surface.tile_swizzle;
uint32_t max_slice = radv_surface_layer_count(iview);
cb->cb_color_view = S_028C6C_SLICE_START(iview->base_layer) |
if (iview->image->fmask.size) {
va = device->ws->buffer_get_va(iview->bo) + iview->image->offset + iview->image->fmask.offset;
cb->cb_color_fmask = va >> 8;
- if (device->physical_device->rad_info.chip_class < GFX9)
- cb->cb_color_fmask |= iview->image->surface.u.legacy.tile_swizzle;
+ cb->cb_color_fmask |= iview->image->fmask.tile_swizzle;
} else {
cb->cb_color_fmask = cb->cb_color_base;
}
format != V_028C70_COLOR_24_8) |
S_028C70_NUMBER_TYPE(ntype) |
S_028C70_ENDIAN(endian);
- if (iview->image->info.samples > 1)
- if (iview->image->fmask.size)
- cb->cb_color_info |= S_028C70_COMPRESSION(1);
+ if ((iview->image->info.samples > 1) && iview->image->fmask.size) {
+ cb->cb_color_info |= S_028C70_COMPRESSION(1);
+ if (device->physical_device->rad_info.chip_class == SI) {
+ unsigned fmask_bankh = util_logbase2(iview->image->fmask.bank_height);
+ cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(fmask_bankh);
+ }
+ }
if (iview->image->cmask.size &&
!(device->debug_flags & RADV_DEBUG_NO_FAST_CLEARS))
cb->cb_color_view |= S_028C6C_MIP_LEVEL(iview->base_mip);
cb->cb_color_attrib |= S_028C74_MIP0_DEPTH(mip0_depth) |
S_028C74_RESOURCE_TYPE(iview->image->surface.u.gfx9.resource_type);
- cb->cb_color_attrib2 = S_028C68_MIP0_WIDTH(iview->image->info.width - 1) |
- S_028C68_MIP0_HEIGHT(iview->image->info.height - 1) |
- S_028C68_MAX_MIP(iview->image->info.levels);
+ cb->cb_color_attrib2 = S_028C68_MIP0_WIDTH(iview->extent.width - 1) |
+ S_028C68_MIP0_HEIGHT(iview->extent.height - 1) |
+ S_028C68_MAX_MIP(iview->image->info.levels - 1);
cb->gfx9_epitch = S_0287A0_EPITCH(iview->image->surface.u.gfx9.surf.epitch);
ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index);
tile_mode_index = si_tile_mode_index(iview->image, level, true);
ds->db_stencil_info |= S_028044_TILE_MODE_INDEX(tile_mode_index);
+ if (stencil_only)
+ ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index);
}
ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) |
const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo,
VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties)
{
- pExternalSemaphoreProperties->exportFromImportedHandleTypes = VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
- pExternalSemaphoreProperties->compatibleHandleTypes = VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
- pExternalSemaphoreProperties->externalSemaphoreFeatures = VK_EXTERNAL_SEMAPHORE_FEATURE_EXPORTABLE_BIT_KHR |
- VK_EXTERNAL_SEMAPHORE_FEATURE_IMPORTABLE_BIT_KHR;
-
+ if (pExternalSemaphoreInfo->handleType == VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR) {
+ pExternalSemaphoreProperties->exportFromImportedHandleTypes = VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
+ pExternalSemaphoreProperties->compatibleHandleTypes = VK_EXTERNAL_SEMAPHORE_HANDLE_TYPE_OPAQUE_FD_BIT_KHR;
+ pExternalSemaphoreProperties->externalSemaphoreFeatures = VK_EXTERNAL_SEMAPHORE_FEATURE_EXPORTABLE_BIT_KHR |
+ VK_EXTERNAL_SEMAPHORE_FEATURE_IMPORTABLE_BIT_KHR;
+ } else {
+ pExternalSemaphoreProperties->exportFromImportedHandleTypes = 0;
+ pExternalSemaphoreProperties->compatibleHandleTypes = 0;
+ pExternalSemaphoreProperties->externalSemaphoreFeatures = 0;
+ }
}
projects / mesa.git / blobdiff