radv: remove radv_get_image_cmask_info()
[mesa.git] / src / amd / vulkan / radv_device.c
index 65e3ccf91ad410c9cd6bfd86b60735515cef31b3..b1da5815f48f80669031a202d8409ee1d54edd75 100644 (file)
@@ -383,6 +383,23 @@ radv_physical_device_init(struct radv_physical_device *device,
 
        device->use_shader_ballot = device->instance->perftest_flags & RADV_PERFTEST_SHADER_BALLOT;
 
+       /* Determine the number of threads per wave for all stages. */
+       device->cs_wave_size = 64;
+       device->ps_wave_size = 64;
+       device->ge_wave_size = 64;
+
+       if (device->rad_info.chip_class >= GFX10) {
+               if (device->instance->perftest_flags & RADV_PERFTEST_CS_WAVE_32)
+                       device->cs_wave_size = 32;
+
+               /* For pixel shaders, wave64 is recommanded. */
+               if (device->instance->perftest_flags & RADV_PERFTEST_PS_WAVE_32)
+                       device->ps_wave_size = 32;
+
+               if (device->instance->perftest_flags & RADV_PERFTEST_GE_WAVE_32)
+                       device->ge_wave_size = 32;
+       }
+
        radv_physical_device_init_mem_types(device);
        radv_fill_device_extension_table(device, &device->supported_extensions);
 
@@ -494,6 +511,9 @@ static const struct debug_control radv_perftest_options[] = {
        {"bolist", RADV_PERFTEST_BO_LIST},
        {"shader_ballot", RADV_PERFTEST_SHADER_BALLOT},
        {"tccompatcmask", RADV_PERFTEST_TC_COMPAT_CMASK},
+       {"cswave32", RADV_PERFTEST_CS_WAVE_32},
+       {"pswave32", RADV_PERFTEST_PS_WAVE_32},
+       {"gewave32", RADV_PERFTEST_GE_WAVE_32},
        {NULL, 0}
 };
 
@@ -953,11 +973,8 @@ void radv_GetPhysicalDeviceFeatures2(
                case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_ATOMIC_INT64_FEATURES_KHR: {
                        VkPhysicalDeviceShaderAtomicInt64FeaturesKHR *features =
                                (VkPhysicalDeviceShaderAtomicInt64FeaturesKHR *)ext;
-                       /* TODO: Enable this once the driver supports 64-bit
-                        * compare&swap atomic operations.
-                        */
-                       features->shaderBufferInt64Atomics = false;
-                       features->shaderSharedInt64Atomics = false;
+                       features->shaderBufferInt64Atomics = HAVE_LLVM >= 0x0900;
+                       features->shaderSharedInt64Atomics = HAVE_LLVM >= 0x0900;
                        break;
                }
                case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_FEATURES_EXT: {
@@ -1930,7 +1947,8 @@ VkResult radv_CreateDevice(
        device->scratch_waves = MAX2(32 * physical_device->rad_info.num_good_compute_units,
                                     max_threads_per_block / 64);
 
-       device->dispatch_initiator = S_00B800_COMPUTE_SHADER_EN(1);
+       device->dispatch_initiator = S_00B800_COMPUTE_SHADER_EN(1) |
+                                    S_00B800_CS_W32_EN(device->physical_device->cs_wave_size == 32);
 
        if (device->physical_device->rad_info.chip_class >= GFX7) {
                /* If the KMD allows it (there is a KMD hw register for it),
@@ -4390,7 +4408,7 @@ radv_initialise_color_surface(struct radv_device *device,
 
                cb->cb_color_pitch = S_028C64_TILE_MAX(pitch_tile_max);
                cb->cb_color_slice = S_028C68_TILE_MAX(slice_tile_max);
-               cb->cb_color_cmask_slice = iview->image->cmask.slice_tile_max;
+               cb->cb_color_cmask_slice = surf->u.legacy.cmask_slice_tile_max;
 
                cb->cb_color_attrib |= S_028C74_TILE_MODE_INDEX(tile_mode_index);
 
@@ -4410,7 +4428,7 @@ radv_initialise_color_surface(struct radv_device *device,
 
        /* CMASK variables */
        va = radv_buffer_get_va(iview->bo) + iview->image->offset;
-       va += iview->image->cmask.offset;
+       va += iview->image->cmask_offset;
        cb->cb_color_cmask = va >> 8;
 
        va = radv_buffer_get_va(iview->bo) + iview->image->offset;