configure.ac: split the wayland client/server confusion

[mesa.git] / src / amd / vulkan / radv_device.c

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 7c218b14783eb8b691c675b30a0b6f0097f1fd5b..e6d595dfbe5e33a45cf597c83fa44136112de69e 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -31,6 +31,7 @@
 #include <fcntl.h>
 #include "radv_debug.h"
 #include "radv_private.h"
+#include "radv_shader.h"
 #include "radv_cs.h"
 #include "util/disk_cache.h"
 #include "util/strtod.h"
@@ -169,6 +170,10 @@ static const VkExtensionProperties common_device_extensions[] = {
                .extensionName = VK_KHR_VARIABLE_POINTERS_EXTENSION_NAME,
                .specVersion = 1,
        },
+       {
+               .extensionName = VK_KHR_IMAGE_FORMAT_LIST_EXTENSION_NAME,
+               .specVersion = 1,
+       },
 };
 static const VkExtensionProperties ext_sema_device_extensions[] = {
        {
@@ -410,15 +415,32 @@ static const struct debug_control radv_debug_options[] = {
        {"allbos", RADV_DEBUG_ALL_BOS},
        {"noibs", RADV_DEBUG_NO_IBS},
        {"spirv", RADV_DEBUG_DUMP_SPIRV},
+       {"vmfaults", RADV_DEBUG_VM_FAULTS},
+       {"zerovram", RADV_DEBUG_ZERO_VRAM},
+       {"syncshaders", RADV_DEBUG_SYNC_SHADERS},
        {NULL, 0}
 };
 
+const char *
+radv_get_debug_option_name(int id)
+{
+       assert(id < ARRAY_SIZE(radv_debug_options) - 1);
+       return radv_debug_options[id].string;
+}
+
 static const struct debug_control radv_perftest_options[] = {
        {"nobatchchain", RADV_PERFTEST_NO_BATCHCHAIN},
        {"sisched", RADV_PERFTEST_SISCHED},
        {NULL, 0}
 };
 
+const char *
+radv_get_perftest_option_name(int id)
+{
+       assert(id < ARRAY_SIZE(radv_debug_options) - 1);
+       return radv_perftest_options[id].string;
+}
+
 VkResult radv_CreateInstance(
        const VkInstanceCreateInfo*                 pCreateInfo,
        const VkAllocationCallbacks*                pAllocator,
@@ -2789,7 +2811,7 @@ VkResult radv_CreateEvent(
 
        event->bo = device->ws->buffer_create(device->ws, 8, 8,
                                              RADEON_DOMAIN_GTT,
-                                             RADEON_FLAG_CPU_ACCESS);
+                                             RADEON_FLAG_VA_UNCACHED | RADEON_FLAG_CPU_ACCESS);
        if (!event->bo) {
                vk_free2(&device->alloc, pAllocator, event);
                return VK_ERROR_OUT_OF_DEVICE_MEMORY;
@@ -3091,8 +3113,8 @@ radv_initialise_color_surface(struct radv_device *device,
        }
 
        if (device->physical_device->rad_info.chip_class >= GFX9) {
-               uint32_t max_slice = radv_surface_layer_count(iview);
-               unsigned mip0_depth = iview->base_layer + max_slice - 1;
+               unsigned mip0_depth = iview->image->type == VK_IMAGE_TYPE_3D ?
+                 (iview->extent.depth - 1) : (iview->image->info.array_size - 1);
 
                cb->cb_color_view |= S_028C6C_MIP_LEVEL(iview->base_mip);
                cb->cb_color_attrib |= S_028C74_MIP0_DEPTH(mip0_depth) |
@@ -3141,7 +3163,7 @@ radv_initialise_ds_surface(struct radv_device *device,
        }
 
        format = radv_translate_dbformat(iview->image->vk_format);
-       stencil_format = iview->image->surface.flags & RADEON_SURF_SBUFFER ?
+       stencil_format = iview->image->surface.has_stencil ?
                V_028044_STENCIL_8 : V_028044_STENCIL_INVALID;
 
        uint32_t max_slice = radv_surface_layer_count(iview);
@@ -3176,7 +3198,7 @@ radv_initialise_ds_surface(struct radv_device *device,
                if (iview->image->surface.htile_size && !level) {
                        ds->db_z_info |= S_028038_TILE_SURFACE_ENABLE(1);
 
-                       if (!(iview->image->surface.flags & RADEON_SURF_SBUFFER))
+                       if (!iview->image->surface.has_stencil)
                                /* Use all of the htile_buffer for depth if there's no stencil. */
                                ds->db_stencil_info |= S_02803C_TILE_STENCIL_DISABLE(1);
                        va = device->ws->buffer_get_va(iview->bo) + iview->image->offset +
@@ -3239,7 +3261,7 @@ radv_initialise_ds_surface(struct radv_device *device,
                if (iview->image->surface.htile_size && !level) {
                        ds->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1);
 
-                       if (!(iview->image->surface.flags & RADEON_SURF_SBUFFER))
+                       if (!iview->image->surface.has_stencil)
                                /* Use all of the htile_buffer for depth if there's no stencil. */
                                ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1);