radv: add radv_dump_pipeline_state() helper

[mesa.git] / src / amd / vulkan / radv_formats.c

diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index da341a3a8483d6d35746ce08410e384f842d05a9..1ac07b41a611acf473daad3c02e7f337686e9342 100644 (file)
--- a/src/amd/vulkan/radv_formats.c
+++ b/src/amd/vulkan/radv_formats.c
@@ -321,10 +321,8 @@ uint32_t radv_translate_tex_dataformat(VkFormat format,
                        return V_008F14_IMG_DATA_FORMAT_32;
                case 2:
                        return V_008F14_IMG_DATA_FORMAT_32_32;
-#if 0 /* Not supported for render targets */
                case 3:
                        return V_008F14_IMG_DATA_FORMAT_32_32_32;
-#endif
                case 4:
                        return V_008F14_IMG_DATA_FORMAT_32_32_32_32;
                }
@@ -541,6 +539,35 @@ static bool radv_is_zs_format_supported(VkFormat format)
        return radv_translate_dbformat(format) != V_028040_Z_INVALID || format == VK_FORMAT_S8_UINT;
 }
 
+static bool radv_is_filter_minmax_format_supported(VkFormat format)
+{
+       /* From the Vulkan spec 1.1.71:
+        *
+        * "The following formats must support the
+        *  VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_MINMAX_BIT_EXT feature with
+        *  VK_IMAGE_TILING_OPTIMAL, if they support
+        *  VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT."
+        */
+       /* TODO: enable more formats. */
+       switch (format) {
+       case VK_FORMAT_R8_UNORM:
+       case VK_FORMAT_R8_SNORM:
+       case VK_FORMAT_R16_UNORM:
+       case VK_FORMAT_R16_SNORM:
+       case VK_FORMAT_R16_SFLOAT:
+       case VK_FORMAT_R32_SFLOAT:
+       case VK_FORMAT_D16_UNORM:
+       case VK_FORMAT_X8_D24_UNORM_PACK32:
+       case VK_FORMAT_D32_SFLOAT:
+       case VK_FORMAT_D16_UNORM_S8_UINT:
+       case VK_FORMAT_D24_UNORM_S8_UINT:
+       case VK_FORMAT_D32_SFLOAT_S8_UINT:
+               return true;
+       default:
+               return false;
+       }
+}
+
 static void
 radv_physical_device_get_format_properties(struct radv_physical_device *physical_device,
                                           VkFormat format,
@@ -578,6 +605,9 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
                        tiled |= VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR |
                                 VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR;
 
+                       if (radv_is_filter_minmax_format_supported(format))
+                                tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_MINMAX_BIT_EXT;
+
                        /* GFX9 doesn't support linear depth surfaces */
                        if (physical_device->rad_info.chip_class >= GFX9)
                                linear = 0;
@@ -589,6 +619,10 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
                                VK_FORMAT_FEATURE_BLIT_SRC_BIT;
                        tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT |
                                VK_FORMAT_FEATURE_BLIT_SRC_BIT;
+
+                       if (radv_is_filter_minmax_format_supported(format))
+                                tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_MINMAX_BIT_EXT;
+
                        if (linear_sampling) {
                                linear |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT;
                                tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT;
@@ -602,13 +636,17 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
                                tiled |= VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT;
                        }
                }
-               if (tiled && util_is_power_of_two(vk_format_get_blocksize(format)) && !scaled) {
+               if (tiled && !scaled) {
                        tiled |= VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR |
                                 VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR;
                }
+
+               /* Tiled formatting does not support NPOT pixel sizes */
+               if (!util_is_power_of_two_or_zero(vk_format_get_blocksize(format)))
+                       tiled = 0;
        }
 
-       if (linear && util_is_power_of_two(vk_format_get_blocksize(format)) && !scaled) {
+       if (linear && !scaled) {
                linear |= VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR |
                          VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR;
        }
@@ -619,6 +657,25 @@ radv_physical_device_get_format_properties(struct radv_physical_device *physical
                tiled |= VK_FORMAT_FEATURE_STORAGE_IMAGE_ATOMIC_BIT;
        }
 
+       switch(format) {
+       case VK_FORMAT_A2R10G10B10_SNORM_PACK32:
+       case VK_FORMAT_A2B10G10R10_SNORM_PACK32:
+       case VK_FORMAT_A2R10G10B10_SSCALED_PACK32:
+       case VK_FORMAT_A2B10G10R10_SSCALED_PACK32:
+       case VK_FORMAT_A2R10G10B10_SINT_PACK32:
+       case VK_FORMAT_A2B10G10R10_SINT_PACK32:
+               if (physical_device->rad_info.chip_class <= VI &&
+                   physical_device->rad_info.family != CHIP_STONEY) {
+                       buffer &= ~(VK_FORMAT_FEATURE_UNIFORM_TEXEL_BUFFER_BIT |
+                                   VK_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_BIT);
+                       linear = 0;
+                       tiled = 0;
+               }
+               break;
+       default:
+               break;
+       }
+
        out_properties->linearTilingFeatures = linear;
        out_properties->optimalTilingFeatures = tiled;
        out_properties->bufferFeatures = buffer;