radv: remove the LLVM version string when ACO is used

[mesa.git] / src / amd / vulkan / radv_image.c

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 7bfd34041cdd49acf0f8331e5166a5e7c4693819..29eb78c7c09d4429ab3e9905339c3a318171fc6d 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -452,8 +452,6 @@ radv_init_surface(struct radv_device *device,
            vk_format_is_compressed(image_format))
                surface->flags |= RADEON_SURF_NO_RENDER_TARGET;
 
-       surface->flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE;
-
        if (!radv_use_dcc_for_image(device, image, pCreateInfo, image_format))
                surface->flags |= RADEON_SURF_DISABLE_DCC;
 
@@ -521,7 +519,7 @@ radv_make_buffer_descriptor(struct radv_device *device,
                   S_008F0C_DST_SEL_W(radv_map_swizzle(desc->swizzle[3]));
 
        if (device->physical_device->rad_info.chip_class >= GFX10) {
-               const struct gfx10_format *fmt = &gfx10_format_table[vk_format];
+               const struct gfx10_format *fmt = gfx10_format_description(vk_format);
 
                /* OOB_SELECT chooses the out-of-bounds check:
                 *  - 0: (index >= NUM_RECORDS) || (offset >= STRIDE)
@@ -611,12 +609,13 @@ si_set_mutable_tex_desc_fields(struct radv_device *device,
                            C_00A018_META_PIPE_ALIGNED;
 
                if (meta_va) {
-                       struct gfx9_surf_meta_flags meta;
+                       struct gfx9_surf_meta_flags meta = {
+                               .rb_aligned = 1,
+                               .pipe_aligned = 1,
+                       };
 
                        if (image->dcc_offset)
                                meta = plane->surface.u.gfx9.dcc;
-                       else
-                               meta = plane->surface.u.gfx9.htile;
 
                        state[6] |= S_00A018_META_PIPE_ALIGNED(meta.pipe_aligned) |
                                    S_00A018_META_DATA_ADDRESS_LO(meta_va >> 8);
@@ -639,12 +638,13 @@ si_set_mutable_tex_desc_fields(struct radv_device *device,
                            C_008F24_META_PIPE_ALIGNED &
                            C_008F24_META_RB_ALIGNED;
                if (meta_va) {
-                       struct gfx9_surf_meta_flags meta;
+                       struct gfx9_surf_meta_flags meta = {
+                               .rb_aligned = 1,
+                               .pipe_aligned = 1,
+                       };
 
                        if (image->dcc_offset)
                                meta = plane->surface.u.gfx9.dcc;
-                       else
-                               meta = plane->surface.u.gfx9.htile;
 
                        state[5] |= S_008F24_META_DATA_ADDRESS(meta_va >> 40) |
                                    S_008F24_META_PIPE_ALIGNED(meta.pipe_aligned) |
@@ -749,7 +749,7 @@ gfx10_make_texture_descriptor(struct radv_device *device,
        unsigned type;
 
        desc = vk_format_description(vk_format);
-       img_format = gfx10_format_table[vk_format].img_format;
+       img_format = gfx10_format_description(vk_format)->img_format;
 
        if (desc->colorspace == VK_FORMAT_COLORSPACE_ZS) {
                const unsigned char swizzle_xxxx[4] = {0, 0, 0, 0};
@@ -846,7 +846,7 @@ gfx10_make_texture_descriptor(struct radv_device *device,
                fmask_state[4] = S_00A010_DEPTH(last_layer) |
                                 S_00A010_BASE_ARRAY(first_layer);
                fmask_state[5] = 0;
-               fmask_state[6] = S_00A018_META_PIPE_ALIGNED(image->planes[0].surface.u.gfx9.cmask.pipe_aligned);
+               fmask_state[6] = S_00A018_META_PIPE_ALIGNED(1);
                fmask_state[7] = 0;
        } else if (fmask_state)
                memset(fmask_state, 0, 8 * 4);
@@ -1034,8 +1034,8 @@ si_make_texture_descriptor(struct radv_device *device,
                        fmask_state[3] |= S_008F1C_SW_MODE(image->planes[0].surface.u.gfx9.fmask.swizzle_mode);
                        fmask_state[4] |= S_008F20_DEPTH(last_layer) |
                                          S_008F20_PITCH(image->planes[0].surface.u.gfx9.fmask.epitch);
-                       fmask_state[5] |= S_008F24_META_PIPE_ALIGNED(image->planes[0].surface.u.gfx9.cmask.pipe_aligned) |
-                                         S_008F24_META_RB_ALIGNED(image->planes[0].surface.u.gfx9.cmask.rb_aligned);
+                       fmask_state[5] |= S_008F24_META_PIPE_ALIGNED(1) |
+                                         S_008F24_META_RB_ALIGNED(1);
 
                        if (radv_image_is_tc_compat_cmask(image)) {
                                va = gpu_address + image->offset + image->cmask_offset;
@@ -1178,27 +1178,9 @@ radv_image_override_offset_stride(struct radv_device *device,
                                   struct radv_image *image,
                                   uint64_t offset, uint32_t stride)
 {
-       struct radeon_surf *surface = &image->planes[0].surface;
-       unsigned bpe = vk_format_get_blocksizebits(image->vk_format) / 8;
-
-       if (device->physical_device->rad_info.chip_class >= GFX9) {
-               if (stride) {
-                       surface->u.gfx9.surf_pitch = stride;
-                       surface->u.gfx9.surf_slice_size =
-                               (uint64_t)stride * surface->u.gfx9.surf_height * bpe;
-               }
-               surface->u.gfx9.surf_offset = offset;
-       } else {
-               surface->u.legacy.level[0].nblk_x = stride;
-               surface->u.legacy.level[0].slice_size_dw =
-                       ((uint64_t)stride * surface->u.legacy.level[0].nblk_y * bpe) / 4;
-
-               if (offset) {
-                       for (unsigned i = 0; i < ARRAY_SIZE(surface->u.legacy.level); ++i)
-                               surface->u.legacy.level[i].offset += offset;
-               }
-
-       }
+       ac_surface_override_offset_stride(&device->physical_device->rad_info,
+                                         &image->planes[0].surface,
+                                         image->info.levels, offset, stride);
 }
 
 static void