* IN THE SOFTWARE.
*/
+#include "radv_debug.h"
#include "radv_meta.h"
#include "radv_private.h"
#include "nir/nir_builder.h"
vs_out_layer->data.location = VARYING_SLOT_LAYER;
vs_out_layer->data.interpolation = INTERP_MODE_FLAT;
nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0);
+ nir_ssa_def *base_instance = nir_load_system_value(&vs_b, nir_intrinsic_load_base_instance, 0);
- nir_store_var(&vs_b, vs_out_layer, inst_id, 0x1);
+ nir_ssa_def *layer_id = nir_iadd(&vs_b, inst_id, base_instance);
+ nir_store_var(&vs_b, vs_out_layer, layer_id, 0x1);
*out_vs = vs_b.shader;
*out_fs = fs_b.shader;
static void
emit_color_clear(struct radv_cmd_buffer *cmd_buffer,
const VkClearAttachment *clear_att,
- const VkClearRect *clear_rect)
+ const VkClearRect *clear_rect,
+ uint32_t view_mask)
{
struct radv_device *device = cmd_buffer->device;
const struct radv_subpass *subpass = cmd_buffer->state.subpass;
radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &clear_rect->rect);
- radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, 0);
+ if (view_mask) {
+ unsigned i;
+ for_each_bit(i, view_mask)
+ radv_CmdDraw(cmd_buffer_h, 3, 1, 0, i);
+ } else {
+ radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, clear_rect->baseArrayLayer);
+ }
radv_cmd_buffer_set_subpass(cmd_buffer, subpass, false);
}
vs_out_layer->data.location = VARYING_SLOT_LAYER;
vs_out_layer->data.interpolation = INTERP_MODE_FLAT;
nir_ssa_def *inst_id = nir_load_system_value(&vs_b, nir_intrinsic_load_instance_id, 0);
- nir_store_var(&vs_b, vs_out_layer, inst_id, 0x1);
+ nir_ssa_def *base_instance = nir_load_system_value(&vs_b, nir_intrinsic_load_base_instance, 0);
+
+ nir_ssa_def *layer_id = nir_iadd(&vs_b, inst_id, base_instance);
+ nir_store_var(&vs_b, vs_out_layer, layer_id, 0x1);
*out_vs = vs_b.shader;
*out_fs = fs_b.shader;
.sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = &(VkAttachmentDescription) {
- .format = VK_FORMAT_UNDEFINED,
+ .format = VK_FORMAT_D32_SFLOAT_S8_UINT,
.samples = samples,
.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
.storeOp = VK_ATTACHMENT_STORE_OP_STORE,
radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &clear_rect->rect);
- radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, 0);
+ radv_CmdDraw(cmd_buffer_h, 3, clear_rect->layerCount, 0, clear_rect->baseArrayLayer);
}
static bool
if (clear_rect->layerCount != iview->image->info.array_size)
goto fail;
- /* Don't do stencil clears till we have figured out if the clear words are
- * correct. */
- if (vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT)
+ if ((clear_value.depth != 0.0 && clear_value.depth != 1.0) || !(aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
goto fail;
- if (clear_value.depth == 1.0)
- clear_word = 0xfffffff0;
- else if (clear_value.depth == 0.0)
- clear_word = 0;
- else
- goto fail;
+ if (vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT) {
+ if (clear_value.stencil != 0 || !(aspects & VK_IMAGE_ASPECT_STENCIL_BIT))
+ goto fail;
+ clear_word = clear_value.depth ? 0xfffc0000 : 0;
+ } else
+ clear_word = clear_value.depth ? 0xfffffff0 : 0;
if (pre_flush) {
cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_DB |
VK_FORMAT_R8G8B8A8_UNORM,
VK_FORMAT_R8G8B8A8_UINT,
VK_FORMAT_R8G8B8A8_SINT,
+ VK_FORMAT_A2R10G10B10_UINT_PACK32,
+ VK_FORMAT_A2R10G10B10_SINT_PACK32,
VK_FORMAT_R16G16B16A16_UNORM,
VK_FORMAT_R16G16B16A16_SNORM,
VK_FORMAT_R16G16B16A16_UINT,
return res;
}
+static void vi_get_fast_clear_parameters(VkFormat format,
+ const VkClearColorValue *clear_value,
+ uint32_t* reset_value,
+ bool *can_avoid_fast_clear_elim)
+{
+ bool values[4] = {};
+ int extra_channel;
+ bool main_value = false;
+ bool extra_value = false;
+ int i;
+ *can_avoid_fast_clear_elim = false;
+
+ *reset_value = 0x20202020U;
+
+ const struct vk_format_description *desc = vk_format_description(format);
+ if (format == VK_FORMAT_B10G11R11_UFLOAT_PACK32 ||
+ format == VK_FORMAT_R5G6B5_UNORM_PACK16 ||
+ format == VK_FORMAT_B5G6R5_UNORM_PACK16)
+ extra_channel = -1;
+ else if (desc->layout == VK_FORMAT_LAYOUT_PLAIN) {
+ if (radv_translate_colorswap(format, false) <= 1)
+ extra_channel = desc->nr_channels - 1;
+ else
+ extra_channel = 0;
+ } else
+ return;
+
+ for (i = 0; i < 4; i++) {
+ int index = desc->swizzle[i] - VK_SWIZZLE_X;
+ if (desc->swizzle[i] < VK_SWIZZLE_X ||
+ desc->swizzle[i] > VK_SWIZZLE_W)
+ continue;
+
+ if (desc->channel[i].pure_integer &&
+ desc->channel[i].type == VK_FORMAT_TYPE_SIGNED) {
+ /* Use the maximum value for clamping the clear color. */
+ int max = u_bit_consecutive(0, desc->channel[i].size - 1);
+
+ values[i] = clear_value->int32[i] != 0;
+ if (clear_value->int32[i] != 0 && MIN2(clear_value->int32[i], max) != max)
+ return;
+ } else if (desc->channel[i].pure_integer &&
+ desc->channel[i].type == VK_FORMAT_TYPE_UNSIGNED) {
+ /* Use the maximum value for clamping the clear color. */
+ unsigned max = u_bit_consecutive(0, desc->channel[i].size);
+
+ values[i] = clear_value->uint32[i] != 0U;
+ if (clear_value->uint32[i] != 0U && MIN2(clear_value->uint32[i], max) != max)
+ return;
+ } else {
+ values[i] = clear_value->float32[i] != 0.0F;
+ if (clear_value->float32[i] != 0.0F && clear_value->float32[i] != 1.0F)
+ return;
+ }
+
+ if (index == extra_channel)
+ extra_value = values[i];
+ else
+ main_value = values[i];
+ }
+
+ for (int i = 0; i < 4; ++i)
+ if (values[i] != main_value &&
+ desc->swizzle[i] - VK_SWIZZLE_X != extra_channel &&
+ desc->swizzle[i] >= VK_SWIZZLE_X &&
+ desc->swizzle[i] <= VK_SWIZZLE_W)
+ return;
+
+ *can_avoid_fast_clear_elim = true;
+ if (main_value)
+ *reset_value |= 0x80808080U;
+
+ if (extra_value)
+ *reset_value |= 0x40404040U;
+ return;
+}
+
static bool
emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
const VkClearAttachment *clear_att,
const VkClearRect *clear_rect,
enum radv_cmd_flush_bits *pre_flush,
- enum radv_cmd_flush_bits *post_flush)
+ enum radv_cmd_flush_bits *post_flush,
+ uint32_t view_mask)
{
const struct radv_subpass *subpass = cmd_buffer->state.subpass;
const uint32_t subpass_att = clear_att->colorAttachment;
if (!radv_layout_can_fast_clear(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index)))
goto fail;
- if (vk_format_get_blocksizebits(iview->image->vk_format) > 64)
- goto fail;
/* don't fast clear 3D */
if (iview->image->type == VK_IMAGE_TYPE_3D)
if (iview->image->info.levels > 1)
goto fail;
- if (iview->image->surface.u.legacy.level[0].mode < RADEON_SURF_MODE_1D)
+ if (iview->image->surface.is_linear)
goto fail;
if (!radv_image_extent_compare(iview->image, &iview->extent))
goto fail;
clear_rect->rect.extent.height != iview->image->info.height)
goto fail;
- if (clear_rect->baseArrayLayer != 0)
+ if (view_mask && (iview->image->info.array_size >= 32 ||
+ (1u << iview->image->info.array_size) - 1u != view_mask))
goto fail;
- if (clear_rect->layerCount != iview->image->info.array_size)
+ if (!view_mask && clear_rect->baseArrayLayer != 0)
+ goto fail;
+ if (!view_mask && clear_rect->layerCount != iview->image->info.array_size)
goto fail;
/* RB+ doesn't work with CMASK fast clear on Stoney. */
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;
/* clear cmask buffer */
if (iview->image->surface.dcc_size) {
+ uint32_t reset_value;
+ bool can_avoid_fast_clear_elim;
+ vi_get_fast_clear_parameters(iview->image->vk_format,
+ &clear_value, &reset_value,
+ &can_avoid_fast_clear_elim);
+
radv_fill_buffer(cmd_buffer, iview->image->bo,
iview->image->offset + iview->image->dcc_offset,
- iview->image->surface.dcc_size, 0x20202020);
+ iview->image->surface.dcc_size, reset_value);
+ radv_set_dcc_need_cmask_elim_pred(cmd_buffer, iview->image,
+ !can_avoid_fast_clear_elim);
} else {
+
+ if (iview->image->surface.bpe > 8) {
+ /* 128 bit formats not supported */
+ return false;
+ }
radv_fill_buffer(cmd_buffer, iview->image->bo,
iview->image->offset + iview->image->cmask.offset,
iview->image->cmask.size, 0);
const VkClearAttachment *clear_att,
const VkClearRect *clear_rect,
enum radv_cmd_flush_bits *pre_flush,
- enum radv_cmd_flush_bits *post_flush)
+ enum radv_cmd_flush_bits *post_flush,
+ uint32_t view_mask)
{
if (clear_att->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
-
if (!emit_fast_color_clear(cmd_buffer, clear_att, clear_rect,
- pre_flush, post_flush))
- emit_color_clear(cmd_buffer, clear_att, clear_rect);
+ pre_flush, post_flush, view_mask))
+ emit_color_clear(cmd_buffer, clear_att, clear_rect, view_mask);
} else {
assert(clear_att->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT |
VK_IMAGE_ASPECT_STENCIL_BIT));
if (!cmd_state->subpass)
return false;
+ uint32_t view_mask = cmd_state->subpass->view_mask;
ds = cmd_state->subpass->depth_stencil_attachment.attachment;
for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
uint32_t a = cmd_state->subpass->color_attachments[i].attachment;
- if (cmd_state->attachments[a].pending_clear_aspects) {
+ if (a != VK_ATTACHMENT_UNUSED &&
+ cmd_state->attachments[a].pending_clear_aspects &&
+ (!view_mask || (view_mask & ~cmd_state->attachments[a].cleared_views))) {
return true;
}
}
if (ds != VK_ATTACHMENT_UNUSED &&
- cmd_state->attachments[ds].pending_clear_aspects) {
+ cmd_state->attachments[ds].pending_clear_aspects &&
+ (!view_mask || (view_mask & ~cmd_state->attachments[ds].cleared_views))) {
return true;
}
struct radv_meta_saved_state saved_state;
enum radv_cmd_flush_bits pre_flush = 0;
enum radv_cmd_flush_bits post_flush = 0;
+ uint32_t view_mask = cmd_buffer->state.subpass->view_mask;
if (!subpass_needs_clear(cmd_buffer))
return;
for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
uint32_t a = cmd_state->subpass->color_attachments[i].attachment;
- if (!cmd_state->attachments[a].pending_clear_aspects)
+ if (a == VK_ATTACHMENT_UNUSED ||
+ !cmd_state->attachments[a].pending_clear_aspects ||
+ (view_mask && !(view_mask & ~cmd_state->attachments[a].cleared_views)))
continue;
assert(cmd_state->attachments[a].pending_clear_aspects ==
.clearValue = cmd_state->attachments[a].clear_value,
};
- emit_clear(cmd_buffer, &clear_att, &clear_rect, &pre_flush, &post_flush);
- cmd_state->attachments[a].pending_clear_aspects = 0;
+ emit_clear(cmd_buffer, &clear_att, &clear_rect, &pre_flush, &post_flush,
+ view_mask & ~cmd_state->attachments[a].cleared_views);
+ if (view_mask)
+ cmd_state->attachments[a].cleared_views |= view_mask;
+ else
+ cmd_state->attachments[a].pending_clear_aspects = 0;
}
uint32_t ds = cmd_state->subpass->depth_stencil_attachment.attachment;
if (ds != VK_ATTACHMENT_UNUSED) {
- if (cmd_state->attachments[ds].pending_clear_aspects) {
+ if (cmd_state->attachments[ds].pending_clear_aspects &&
+ (!view_mask || (view_mask & ~cmd_state->attachments[ds].cleared_views))) {
VkClearAttachment clear_att = {
.aspectMask = cmd_state->attachments[ds].pending_clear_aspects,
};
emit_clear(cmd_buffer, &clear_att, &clear_rect,
- &pre_flush, &post_flush);
- cmd_state->attachments[ds].pending_clear_aspects = 0;
+ &pre_flush, &post_flush,
+ view_mask & ~cmd_state->attachments[ds].cleared_views);
+ if (view_mask)
+ cmd_state->attachments[ds].cleared_views |= view_mask;
+ else
+ cmd_state->attachments[ds].pending_clear_aspects = 0;
}
}
.layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
};
- emit_clear(cmd_buffer, &clear_att, &clear_rect, NULL, NULL);
+ emit_clear(cmd_buffer, &clear_att, &clear_rect, NULL, NULL, 0);
radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
radv_DestroyRenderPass(device_h, pass,
*/
for (uint32_t a = 0; a < attachmentCount; ++a) {
for (uint32_t r = 0; r < rectCount; ++r) {
- emit_clear(cmd_buffer, &pAttachments[a], &pRects[r], &pre_flush, &post_flush);
+ emit_clear(cmd_buffer, &pAttachments[a], &pRects[r], &pre_flush, &post_flush,
+ cmd_buffer->state.subpass->view_mask);
}
}
projects / mesa.git / blobdiff