radv: Disable texel buffers with A2 SNORM/SSCALED/SINT for pre-vega.

[mesa.git] / src / amd / vulkan / radv_meta_decompress.c

diff --git a/src/amd/vulkan/radv_meta_decompress.c b/src/amd/vulkan/radv_meta_decompress.c
index 2a5459da06e1016a5bd3e72e37485f53c7843c45..1a8058c7cc53d8333a1da73032d5d330dec7f002 100644 (file)
--- a/src/amd/vulkan/radv_meta_decompress.c
+++ b/src/amd/vulkan/radv_meta_decompress.c
@@ -75,11 +75,29 @@ create_pass(struct radv_device *device,
        return result;
 }
 
+static VkResult
+create_pipeline_layout(struct radv_device *device, VkPipelineLayout *layout)
+{
+       VkPipelineLayoutCreateInfo pl_create_info = {
+               .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
+               .setLayoutCount = 0,
+               .pSetLayouts = NULL,
+               .pushConstantRangeCount = 0,
+               .pPushConstantRanges = NULL,
+       };
+
+       return radv_CreatePipelineLayout(radv_device_to_handle(device),
+                                        &pl_create_info,
+                                        &device->meta_state.alloc,
+                                        layout);
+}
+
 static VkResult
 create_pipeline(struct radv_device *device,
                 VkShaderModule vs_module_h,
                uint32_t samples,
                VkRenderPass pass,
+               VkPipelineLayout layout,
                VkPipeline *decompress_pipeline,
                VkPipeline *resummarize_pipeline)
 {
@@ -165,6 +183,7 @@ create_pipeline(struct radv_device *device,
                                VK_DYNAMIC_STATE_SCISSOR,
                        },
                },
+               .layout = layout,
                .renderPass = pass,
                .subpass = 0,
        };
@@ -212,6 +231,9 @@ radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
                radv_DestroyRenderPass(radv_device_to_handle(device),
                                       state->depth_decomp[i].pass,
                                       &state->alloc);
+               radv_DestroyPipelineLayout(radv_device_to_handle(device),
+                                          state->depth_decomp[i].p_layout,
+                                          &state->alloc);
                radv_DestroyPipeline(radv_device_to_handle(device),
                                     state->depth_decomp[i].decompress_pipeline,
                                     &state->alloc);
@@ -243,8 +265,14 @@ radv_device_init_meta_depth_decomp_state(struct radv_device *device)
                if (res != VK_SUCCESS)
                        goto fail;
 
+               res = create_pipeline_layout(device,
+                                            &state->depth_decomp[i].p_layout);
+               if (res != VK_SUCCESS)
+                       goto fail;
+
                res = create_pipeline(device, vs_module_h, samples,
                                      state->depth_decomp[i].pass,
+                                     state->depth_decomp[i].p_layout,
                                      &state->depth_decomp[i].decompress_pipeline,
                                      &state->depth_decomp[i].resummarize_pipeline);
                if (res != VK_SUCCESS)
@@ -301,7 +329,6 @@ static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
                                             enum radv_depth_op op)
 {
        struct radv_meta_saved_state saved_state;
-       struct radv_meta_saved_pass_state saved_pass_state;
        VkDevice device_h = radv_device_to_handle(cmd_buffer->device);
        VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
        uint32_t width = radv_minify(image->info.width,
@@ -313,12 +340,12 @@ static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
        struct radv_meta_state *meta_state = &cmd_buffer->device->meta_state;
        VkPipeline pipeline_h;
 
-       if (!image->surface.htile_size)
+       if (!radv_image_has_htile(image))
                return;
-       radv_meta_save_pass(&saved_pass_state, cmd_buffer);
 
-       radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer,
-                                                            RADV_META_SAVE_GRAPHICS_PIPELINE);
+       radv_meta_save(&saved_state, cmd_buffer,
+                      RADV_META_SAVE_GRAPHICS_PIPELINE |
+                      RADV_META_SAVE_PASS);
 
        switch (op) {
        case DEPTH_DECOMPRESS:
@@ -392,7 +419,6 @@ static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
                                        &cmd_buffer->pool->alloc);
        }
        radv_meta_restore(&saved_state, cmd_buffer);
-       radv_meta_restore_pass(&saved_pass_state, cmd_buffer);
 }
 
 void radv_decompress_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,