false,
false,
GLSL_TYPE_FLOAT);
- const struct glsl_type *img_type = glsl_sampler_type(GLSL_SAMPLER_DIM_2D,
- false,
- false,
- GLSL_TYPE_FLOAT);
+ const struct glsl_type *img_type = glsl_image_type(GLSL_SAMPLER_DIM_2D,
+ false,
+ GLSL_TYPE_FLOAT);
nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL);
b.shader->info.name = ralloc_strdup(b.shader, "dcc_decompress_compute");
output_img->data.binding = 1;
nir_ssa_def *invoc_id = nir_load_local_invocation_id(&b);
- nir_ssa_def *wg_id = nir_load_work_group_id(&b);
+ nir_ssa_def *wg_id = nir_load_work_group_id(&b, 32);
nir_ssa_def *block_size = nir_imm_ivec4(&b,
b.shader->info.cs.local_size[0],
b.shader->info.cs.local_size[1],
nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
nir_builder_instr_insert(&b, &tex->instr);
- nir_intrinsic_instr *membar = nir_intrinsic_instr_create(b.shader, nir_intrinsic_memory_barrier);
- nir_builder_instr_insert(&b, &membar->instr);
-
- nir_intrinsic_instr *bar = nir_intrinsic_instr_create(b.shader, nir_intrinsic_barrier);
- nir_builder_instr_insert(&b, &bar->instr);
+ nir_scoped_barrier(&b, NIR_SCOPE_WORKGROUP, NIR_SCOPE_WORKGROUP,
+ NIR_MEMORY_ACQ_REL, nir_var_mem_ssbo);
nir_ssa_def *outval = &tex->dest.ssa;
nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_deref_store);
store->src[1] = nir_src_for_ssa(global_id);
store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
store->src[3] = nir_src_for_ssa(outval);
+ store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0));
nir_builder_instr_insert(&b, &store->instr);
return b.shader;
.preserveAttachmentCount = 0,
.pPreserveAttachments = NULL,
},
- .dependencyCount = 0,
+ .dependencyCount = 2,
+ .pDependencies = (VkSubpassDependency[]) {
+ {
+ .srcSubpass = VK_SUBPASS_EXTERNAL,
+ .dstSubpass = 0,
+ .srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+ .dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
+ .srcAccessMask = 0,
+ .dstAccessMask = 0,
+ .dependencyFlags = 0
+ },
+ {
+ .srcSubpass = 0,
+ .dstSubpass = VK_SUBPASS_EXTERNAL,
+ .srcStageMask = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+ .dstStageMask = VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
+ .srcAccessMask = 0,
+ .dstAccessMask = 0,
+ .dependencyFlags = 0
+ }
+ },
},
alloc,
&device->meta_state.fast_clear_flush.pass);
.layers = 1
}, &cmd_buffer->pool->alloc, &fb_h);
- radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer),
- &(VkRenderPassBeginInfo) {
- .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
- .renderPass = device->meta_state.fast_clear_flush.pass,
- .framebuffer = fb_h,
- .renderArea = {
- .offset = {
- 0,
- 0,
+ radv_cmd_buffer_begin_render_pass(cmd_buffer,
+ &(VkRenderPassBeginInfo) {
+ .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
+ .renderPass = device->meta_state.fast_clear_flush.pass,
+ .framebuffer = fb_h,
+ .renderArea = {
+ .offset = { 0, 0, },
+ .extent = { width, height, }
},
- .extent = {
- width,
- height,
- }
- },
- .clearValueCount = 0,
- .pClearValues = NULL,
- }, VK_SUBPASS_CONTENTS_INLINE);
+ .clearValueCount = 0,
+ .pClearValues = NULL,
+ });
+
+ radv_cmd_buffer_set_subpass(cmd_buffer,
+ &cmd_buffer->state.pass->subpasses[0]);
radv_CmdDraw(radv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB |
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;
- radv_CmdEndRenderPass(radv_cmd_buffer_to_handle(cmd_buffer));
+ radv_cmd_buffer_end_render_pass(cmd_buffer);
radv_DestroyFramebuffer(radv_device_to_handle(device), fb_h,
&cmd_buffer->pool->alloc);
struct radv_image *image,
const VkImageSubresourceRange *subresourceRange)
{
+ struct radv_barrier_data barrier = {};
+
+ if (radv_image_has_fmask(image)) {
+ barrier.layout_transitions.fmask_decompress = 1;
+ } else {
+ barrier.layout_transitions.fast_clear_eliminate = 1;
+ }
+ radv_describe_layout_transition(cmd_buffer, &barrier);
+
radv_emit_color_decompress(cmd_buffer, image, subresourceRange, false);
}
struct radv_image *image,
const VkImageSubresourceRange *subresourceRange)
{
+ struct radv_barrier_data barrier = {};
+
+ barrier.layout_transitions.dcc_decompress = 1;
+ radv_describe_layout_transition(cmd_buffer, &barrier);
+
if (cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL)
radv_decompress_dcc_gfx(cmd_buffer, image, subresourceRange);
else