radv: improve reporting faulty pipelines when a GPU hang is detected
[mesa.git] / src / amd / vulkan / radv_meta_fmask_expand.c
index ca0b82a3bf4155b3df91477675c4b9efba91ff08..3a109110c951725d738aed6af3075dc6ddc536d9 100644 (file)
@@ -31,9 +31,12 @@ build_fmask_expand_compute_shader(struct radv_device *device, int samples)
 {
        nir_builder b;
        char name[64];
-       const struct glsl_type *img_type =
+       const struct glsl_type *type =
                glsl_sampler_type(GLSL_SAMPLER_DIM_MS, false, false,
                                  GLSL_TYPE_FLOAT);
+       const struct glsl_type *img_type =
+               glsl_image_type(GLSL_SAMPLER_DIM_MS, false,
+                                 GLSL_TYPE_FLOAT);
 
        snprintf(name, 64, "meta_fmask_expand_cs-%d", samples);
 
@@ -44,7 +47,7 @@ build_fmask_expand_compute_shader(struct radv_device *device, int samples)
        b.shader->info.cs.local_size[2] = 1;
 
        nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform,
-                                                     img_type, "s_tex");
+                                                     type, "s_tex");
        input_img->data.descriptor_set = 0;
        input_img->data.binding = 0;
 
@@ -55,7 +58,7 @@ build_fmask_expand_compute_shader(struct radv_device *device, int samples)
        output_img->data.access = ACCESS_NON_READABLE;
 
        nir_ssa_def *invoc_id = nir_load_local_invocation_id(&b);
-       nir_ssa_def *wg_id = nir_load_work_group_id(&b);
+       nir_ssa_def *wg_id = nir_load_work_group_id(&b, 32);
        nir_ssa_def *block_size = nir_imm_ivec4(&b,
                                                b.shader->info.cs.local_size[0],
                                                b.shader->info.cs.local_size[1],