radv: Don't handle DCC in compute resolve.

[mesa.git] / src / amd / vulkan / radv_meta_resolve.c

diff --git a/src/amd/vulkan/radv_meta_resolve.c b/src/amd/vulkan/radv_meta_resolve.c
index 6023e0f89998262e7cfdea1c531d056f28dfbba2..e73a950ab7cf7094f8d14b166271d4fe26270cd5 100644 (file)
--- a/src/amd/vulkan/radv_meta_resolve.c
+++ b/src/amd/vulkan/radv_meta_resolve.c
@@ -121,6 +121,21 @@ create_pipeline(struct radv_device *device,
                goto cleanup;
        }
 
+       VkPipelineLayoutCreateInfo pl_create_info = {
+               .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
+               .setLayoutCount = 0,
+               .pSetLayouts = NULL,
+               .pushConstantRangeCount = 0,
+               .pPushConstantRanges = NULL,
+       };
+
+       result = radv_CreatePipelineLayout(radv_device_to_handle(device),
+                                          &pl_create_info,
+                                          &device->meta_state.alloc,
+                                          &device->meta_state.resolve.p_layout);
+       if (result != VK_SUCCESS)
+               goto cleanup;
+
        result = radv_graphics_pipeline_create(device_h,
                                               radv_pipeline_cache_to_handle(&device->meta_state.cache),
                                               &(VkGraphicsPipelineCreateInfo) {
@@ -196,6 +211,7 @@ create_pipeline(struct radv_device *device,
                                                                VK_DYNAMIC_STATE_SCISSOR,
                                                        },
                                                },
+                                               .layout = device->meta_state.resolve.p_layout,
                                                                                                                                       .renderPass = device->meta_state.resolve.pass,
                                                                                                                                       .subpass = 0,
                                                                                                                                       },
@@ -219,18 +235,13 @@ void
 radv_device_finish_meta_resolve_state(struct radv_device *device)
 {
        struct radv_meta_state *state = &device->meta_state;
-       VkDevice device_h = radv_device_to_handle(device);
-       VkRenderPass pass_h = device->meta_state.resolve.pass;
-       const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
 
-       if (pass_h)
-               radv_DestroyRenderPass(device_h, pass_h,
-                                            &device->meta_state.alloc);
-
-       VkPipeline pipeline_h = state->resolve.pipeline;
-       if (pipeline_h) {
-               radv_DestroyPipeline(device_h, pipeline_h, alloc);
-       }
+       radv_DestroyRenderPass(radv_device_to_handle(device),
+                              state->resolve.pass, &state->alloc);
+       radv_DestroyPipelineLayout(radv_device_to_handle(device),
+                                  state->resolve.p_layout, &state->alloc);
+       radv_DestroyPipeline(radv_device_to_handle(device),
+                            state->resolve.pipeline, &state->alloc);
 }
 
 VkResult
@@ -238,8 +249,6 @@ radv_device_init_meta_resolve_state(struct radv_device *device)
 {
        VkResult res = VK_SUCCESS;
 
-       zero(device->meta_state.resolve);
-
        struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
        if (!vs_module.nir) {
                /* XXX: Need more accurate error */
@@ -277,13 +286,8 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer,
 
        cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
 
-       VkPipeline pipeline_h = device->meta_state.resolve.pipeline;
-       RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h);
-
-       if (cmd_buffer->state.pipeline != pipeline) {
-               radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
-                                    pipeline_h);
-       }
+       radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
+                            device->meta_state.resolve.pipeline);
 
        radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) {
                .x = dest_offset->x,
@@ -379,7 +383,8 @@ void radv_CmdResolveImage(
                return;
        }
 
-       radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer);
+       radv_meta_save(&saved_state, cmd_buffer,
+                      RADV_META_SAVE_GRAPHICS_PIPELINE);
 
        assert(src_image->info.samples > 1);
        if (src_image->info.samples <= 1) {
@@ -587,7 +592,8 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer)
                return;
        }
 
-       radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer);
+       radv_meta_save(&saved_state, cmd_buffer,
+                      RADV_META_SAVE_GRAPHICS_PIPELINE);
 
        for (uint32_t i = 0; i < subpass->color_count; ++i) {
                VkAttachmentReference src_att = subpass->color_attachments[i];
@@ -612,13 +618,6 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer)
 
                radv_cmd_buffer_set_subpass(cmd_buffer, &resolve_subpass, false);
 
-               /* Subpass resolves must respect the render area. We can ignore the
-                * render area here because vkCmdBeginRenderPass set the render area
-                * with 3DSTATE_DRAWING_RECTANGLE.
-                *
-                * XXX(chadv): Does the hardware really respect
-                * 3DSTATE_DRAWING_RECTANGLE when draing a 3DPRIM_RECTLIST?
-                */
                emit_resolve(cmd_buffer,
                             &(VkOffset2D) { 0, 0 },
                             &(VkExtent2D) { fb->width, fb->height });