radv: update VK_KHR_8bit_storage for Vulkan 1.2
[mesa.git] / src / amd / vulkan / radv_meta_resolve_cs.c
index c06f0f2c5ce6ef10a857a4ccab9cd2ce25db1cf4..f1b38d3ffc8b5d4b2c429b0a4def56bc827d80da 100644 (file)
@@ -135,6 +135,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s
        store->src[1] = nir_src_for_ssa(coord);
        store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
        store->src[3] = nir_src_for_ssa(outval);
+       store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0));
        nir_builder_instr_insert(&b, &store->instr);
        return b.shader;
 }
@@ -295,6 +296,7 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
        store->src[1] = nir_src_for_ssa(coord);
        store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
        store->src[3] = nir_src_for_ssa(outval);
+       store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0));
        nir_builder_instr_insert(&b, &store->instr);
        return b.shader;
 }
@@ -863,7 +865,7 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer,
                                                             .baseArrayLayer = src_base_layer + layer,
                                                             .layerCount = 1,
                                                     },
-                                            });
+                                            }, NULL);
 
                        struct radv_image_view dest_iview;
                        radv_image_view_init(&dest_iview, cmd_buffer->device,
@@ -879,7 +881,7 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer,
                                                             .baseArrayLayer = dest_base_layer + layer,
                                                             .layerCount = 1,
                                                     },
-                                            });
+                                            }, NULL);
 
                        emit_resolve(cmd_buffer,
                                     &src_iview,
@@ -917,12 +919,13 @@ radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer)
        for (uint32_t i = 0; i < subpass->color_count; ++i) {
                struct radv_subpass_attachment src_att = subpass->color_attachments[i];
                struct radv_subpass_attachment dst_att = subpass->resolve_attachments[i];
-               struct radv_image_view *src_iview = fb->attachments[src_att.attachment].attachment;
-               struct radv_image_view *dst_iview = fb->attachments[dst_att.attachment].attachment;
 
                if (dst_att.attachment == VK_ATTACHMENT_UNUSED)
                        continue;
 
+               struct radv_image_view *src_iview = cmd_buffer->state.attachments[src_att.attachment].iview;
+               struct radv_image_view *dst_iview = cmd_buffer->state.attachments[dst_att.attachment].iview;
+
                VkImageResolve region = {
                        .extent = (VkExtent3D){ fb->width, fb->height, 0 },
                        .srcSubresource = (VkImageSubresourceLayers) {
@@ -952,7 +955,7 @@ radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer)
        }
 
        cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
-                                       RADV_CMD_FLAG_INV_VMEM_L1;
+                                       RADV_CMD_FLAG_INV_VCACHE;
 }
 
 void
@@ -988,9 +991,9 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
        struct radv_subpass_attachment dest_att = *subpass->ds_resolve_attachment;
 
        struct radv_image_view *src_iview =
-               cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment;
+               cmd_buffer->state.attachments[src_att.attachment].iview;
        struct radv_image_view *dst_iview =
-               cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment;
+               cmd_buffer->state.attachments[dest_att.attachment].iview;
 
        struct radv_image *src_image = src_iview->image;
        struct radv_image *dst_image = dst_iview->image;
@@ -1010,7 +1013,7 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
                                                .baseArrayLayer = src_iview->base_layer + layer,
                                                .layerCount = 1,
                                        },
-                                    });
+                                    }, NULL);
 
                struct radv_image_view tdst_iview;
                radv_image_view_init(&tdst_iview, cmd_buffer->device,
@@ -1026,7 +1029,7 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
                                                .baseArrayLayer = dst_iview->base_layer + layer,
                                                .layerCount = 1,
                                        },
-                                    });
+                                    }, NULL);
 
                emit_depth_stencil_resolve(cmd_buffer, &tsrc_iview, &tdst_iview,
                                           &(VkOffset2D) { 0, 0 },
@@ -1037,12 +1040,12 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
        }
 
        cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
-                                       RADV_CMD_FLAG_INV_VMEM_L1;
+                                       RADV_CMD_FLAG_INV_VCACHE;
 
        if (radv_image_has_htile(dst_image)) {
                if (aspects == VK_IMAGE_ASPECT_DEPTH_BIT) {
                        VkImageSubresourceRange range = {};
-                       range.aspectMask = aspects;
+                       range.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT;
                        range.baseMipLevel = dst_iview->base_mip;
                        range.levelCount = 1;
                        range.baseArrayLayer = dst_iview->base_layer;