radv: update VK_KHR_8bit_storage for Vulkan 1.2

[mesa.git] / src / amd / vulkan / radv_meta_resolve_cs.c

diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c
index f3bdfdbbd11bc8cbd47508ab507906adb6b04ad2..f1b38d3ffc8b5d4b2c429b0a4def56bc827d80da 100644 (file)
--- a/src/amd/vulkan/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/radv_meta_resolve_cs.c
@@ -135,6 +135,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s
        store->src[1] = nir_src_for_ssa(coord);
        store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
        store->src[3] = nir_src_for_ssa(outval);
+       store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0));
        nir_builder_instr_insert(&b, &store->instr);
        return b.shader;
 }
@@ -295,6 +296,7 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
        store->src[1] = nir_src_for_ssa(coord);
        store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32));
        store->src[3] = nir_src_for_ssa(outval);
+       store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0));
        nir_builder_instr_insert(&b, &store->instr);
        return b.shader;
 }
@@ -1043,7 +1045,7 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
        if (radv_image_has_htile(dst_image)) {
                if (aspects == VK_IMAGE_ASPECT_DEPTH_BIT) {
                        VkImageSubresourceRange range = {};
-                       range.aspectMask = aspects;
+                       range.aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT;
                        range.baseMipLevel = dst_iview->base_mip;
                        range.levelCount = 1;
                        range.baseArrayLayer = dst_iview->base_layer;