radv: do not use an user SGPR for the sample position offset
[mesa.git] / src / amd / vulkan / radv_nir_to_llvm.c
index a56f017e25c7e3869f7ec9f9f92c29bf4b90f476..cd8d86603bc4debcffc8d2da12d8fee503a8d1d7 100644 (file)
@@ -81,7 +81,6 @@ struct radv_shader_context {
        LLVMValueRef hs_ring_tess_offchip;
        LLVMValueRef hs_ring_tess_factor;
 
-       LLVMValueRef sample_pos_offset;
        LLVMValueRef persp_sample, persp_center, persp_centroid;
        LLVMValueRef linear_sample, linear_center, linear_centroid;
 
@@ -1095,10 +1094,6 @@ static void create_function(struct radv_shader_context *ctx,
                                           previous_stage, &user_sgpr_info,
                                           &args, &desc_sets);
 
-               if (ctx->shader_info->info.ps.needs_sample_positions)
-                       add_arg(&args, ARG_SGPR, ctx->ac.i32,
-                               &ctx->sample_pos_offset);
-
                add_arg(&args, ARG_SGPR, ctx->ac.i32, &ctx->abi.prim_mask);
                add_arg(&args, ARG_VGPR, ctx->ac.v2i32, &ctx->persp_sample);
                add_arg(&args, ARG_VGPR, ctx->ac.v2i32, &ctx->persp_center);
@@ -1194,10 +1189,6 @@ static void create_function(struct radv_shader_context *ctx,
                        set_loc_shader(ctx, AC_UD_VIEW_INDEX, &user_sgpr_idx, 1);
                break;
        case MESA_SHADER_FRAGMENT:
-               if (ctx->shader_info->info.ps.needs_sample_positions) {
-                       set_loc_shader(ctx, AC_UD_PS_SAMPLE_POS_OFFSET,
-                                      &user_sgpr_idx, 1);
-               }
                break;
        default:
                unreachable("Shader stage not implemented");
@@ -1627,6 +1618,30 @@ static LLVMValueRef lookup_interp_param(struct ac_shader_abi *abi,
        return NULL;
 }
 
+static uint32_t
+radv_get_sample_pos_offset(uint32_t num_samples)
+{
+       uint32_t sample_pos_offset = 0;
+
+       switch (num_samples) {
+       case 2:
+               sample_pos_offset = 1;
+               break;
+       case 4:
+               sample_pos_offset = 3;
+               break;
+       case 8:
+               sample_pos_offset = 7;
+               break;
+       case 16:
+               sample_pos_offset = 15;
+               break;
+       default:
+               break;
+       }
+       return sample_pos_offset;
+}
+
 static LLVMValueRef load_sample_position(struct ac_shader_abi *abi,
                                         LLVMValueRef sample_id)
 {
@@ -1638,7 +1653,12 @@ static LLVMValueRef load_sample_position(struct ac_shader_abi *abi,
        ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
                               ac_array_in_const_addr_space(ctx->ac.v2f32), "");
 
-       sample_id = LLVMBuildAdd(ctx->ac.builder, sample_id, ctx->sample_pos_offset, "");
+       uint32_t sample_pos_offset =
+               radv_get_sample_pos_offset(ctx->options->key.fs.num_samples);
+
+       sample_id =
+               LLVMBuildAdd(ctx->ac.builder, sample_id,
+                            LLVMConstInt(ctx->ac.i32, sample_pos_offset, false), "");
        result = ac_build_load_invariant(&ctx->ac, ptr, sample_id);
 
        return result;
@@ -1648,9 +1668,14 @@ static LLVMValueRef load_sample_position(struct ac_shader_abi *abi,
 static LLVMValueRef load_sample_mask_in(struct ac_shader_abi *abi)
 {
        struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
-       uint8_t log2_ps_iter_samples = ctx->shader_info->info.ps.force_persample ?
-               ctx->options->key.fs.log2_num_samples :
-               ctx->options->key.fs.log2_ps_iter_samples;
+       uint8_t log2_ps_iter_samples;
+
+       if (ctx->shader_info->info.ps.force_persample) {
+               log2_ps_iter_samples =
+                       util_logbase2(ctx->options->key.fs.num_samples);
+       } else {
+               log2_ps_iter_samples = ctx->options->key.fs.log2_ps_iter_samples;
+       }
 
        /* The bit pattern matches that used by fixed function fragment
         * processing. */
@@ -2967,13 +2992,17 @@ handle_shader_outputs_post(struct ac_shader_abi *abi, unsigned max_outputs,
        }
 }
 
-static void ac_llvm_finalize_module(struct radv_shader_context *ctx)
+static void ac_llvm_finalize_module(struct radv_shader_context *ctx,
+                                   const struct radv_nir_compiler_options *options)
 {
        LLVMPassManagerRef passmgr;
        /* Create the pass manager */
        passmgr = LLVMCreateFunctionPassManagerForModule(
                                                        ctx->ac.module);
 
+       if (options->check_ir)
+               LLVMAddVerifierPass(passmgr);
+
        /* This pass should eliminate all the load and store instructions */
        LLVMAddPromoteMemoryToRegisterPass(passmgr);
 
@@ -3103,7 +3132,6 @@ static void ac_nir_fixup_ls_hs_input_vgprs(struct radv_shader_context *ctx)
        LLVMValueRef hs_empty = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, count,
                                              ctx->ac.i32_0, "");
        ctx->abi.instance_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->rel_auto_id, ctx->abi.instance_id, "");
-       ctx->vs_prim_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->abi.vertex_id, ctx->vs_prim_id, "");
        ctx->rel_auto_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->abi.tcs_rel_ids, ctx->rel_auto_id, "");
        ctx->abi.vertex_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->abi.tcs_patch_id, ctx->abi.vertex_id, "");
 }
@@ -3299,7 +3327,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
        if (options->dump_preoptir)
                ac_dump_module(ctx.ac.module);
 
-       ac_llvm_finalize_module(&ctx);
+       ac_llvm_finalize_module(&ctx, options);
 
        if (shader_count == 1)
                ac_nir_eliminate_const_vs_outputs(&ctx);
@@ -3617,7 +3645,7 @@ radv_compile_gs_copy_shader(LLVMTargetMachineRef tm,
 
        LLVMBuildRetVoid(ctx.ac.builder);
 
-       ac_llvm_finalize_module(&ctx);
+       ac_llvm_finalize_module(&ctx, options);
 
        ac_compile_llvm_module(tm, ctx.ac.module, binary, config, shader_info,
                               MESA_SHADER_VERTEX, options);