radv: switch on EOP when primitive restart is enabled with triangle strips
[mesa.git] / src / amd / vulkan / radv_pipeline.c
index f999383018288ffc951be32440d1f732e2affb68..92c35b2e5091d38cde5a38893c54b09013444b4e 100644 (file)
@@ -1814,6 +1814,10 @@ radv_link_shaders(struct radv_pipeline *pipeline, nir_shader **shaders)
                nir_lower_io_arrays_to_elements(ordered_shaders[i],
                                                ordered_shaders[i - 1]);
 
+               if (nir_link_constant_varyings(ordered_shaders[i],
+                                              ordered_shaders[i - 1]))
+                       radv_optimize_nir(ordered_shaders[i - 1], false, false);
+
                nir_remove_dead_variables(ordered_shaders[i],
                                          nir_var_shader_out);
                nir_remove_dead_variables(ordered_shaders[i - 1],
@@ -2701,7 +2705,7 @@ radv_pipeline_generate_raster_state(struct radeon_cmdbuf *cs,
        const VkPipelineRasterizationStateCreateInfo *vkraster = pCreateInfo->pRasterizationState;
        const VkConservativeRasterizationModeEXT mode =
                radv_get_conservative_raster_mode(vkraster);
-       uint32_t pa_sc_conservative_rast = 0;
+       uint32_t pa_sc_conservative_rast = S_028C4C_NULL_SQUAD_AA_MASK_ENABLE(1);
 
        radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL,
                               S_028810_DX_CLIP_SPACE_DEF(1) | // vulkan uses DX conventions.
@@ -3390,8 +3394,7 @@ radv_compute_ia_multi_vgt_param_helpers(struct radv_pipeline *pipeline,
                    (pipeline->graphics.prim_restart_enable &&
                     (device->physical_device->rad_info.family < CHIP_POLARIS10 ||
                      (prim != V_008958_DI_PT_POINTLIST &&
-                      prim != V_008958_DI_PT_LINESTRIP &&
-                      prim != V_008958_DI_PT_TRISTRIP))))
+                      prim != V_008958_DI_PT_LINESTRIP))))
                        ia_multi_vgt_param.wd_switch_on_eop = true;
        }