int master_fd;
struct wsi_device wsi_device;
- bool rbplus_allowed; /* if RB+ is allowed */
- bool cpdma_prefetch_writes_memory;
- bool has_scissor_bug;
- bool has_tc_compat_zrange_bug;
-
- bool has_out_of_order_rast;
bool out_of_order_rast_allowed;
/* Whether DCC should be enabled for MSAA textures. */
};
/* radv_nir_to_llvm.c */
-struct radv_shader_variant_info;
+struct radv_shader_info;
struct radv_nir_compiler_options;
void radv_compile_gs_copy_shader(struct ac_llvm_compiler *ac_llvm,
struct nir_shader *geom_shader,
struct radv_shader_binary **rbinary,
- struct radv_shader_variant_info *shader_info,
+ struct radv_shader_info *info,
const struct radv_nir_compiler_options *option);
void radv_compile_nir_shader(struct ac_llvm_compiler *ac_llvm,
struct radv_shader_binary **rbinary,
- struct radv_shader_variant_info *shader_info,
+ struct radv_shader_info *info,
struct nir_shader *const *nir,
int nir_count,
const struct radv_nir_compiler_options *options);
/* radv_shader_info.h */
struct radv_shader_info;
+struct radv_shader_variant_key;
void radv_nir_shader_info_pass(const struct nir_shader *nir,
- const struct radv_nir_compiler_options *options,
+ const struct radv_pipeline_layout *layout,
+ const struct radv_shader_variant_key *key,
struct radv_shader_info *info);
void radv_nir_shader_info_init(struct radv_shader_info *info);