RADV_MEM_TYPE_COUNT
};
+
+enum {
+ RADV_DEBUG_FAST_CLEARS = 0x1,
+ RADV_DEBUG_NO_DCC = 0x2,
+ RADV_DEBUG_DUMP_SHADERS = 0x4,
+ RADV_DEBUG_NO_CACHE = 0x8,
+ RADV_DEBUG_DUMP_SHADER_STATS = 0x10,
+ RADV_DEBUG_NO_HIZ = 0x20,
+ RADV_DEBUG_NO_COMPUTE_QUEUE = 0x40,
+ RADV_DEBUG_UNSAFE_MATH = 0x80,
+};
+
#define radv_noreturn __attribute__((__noreturn__))
#define radv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
struct radeon_winsys *ws;
struct radeon_info rad_info;
- uint32_t chipset_id;
char path[20];
const char * name;
- uint64_t aperture_size;
- int cmd_parser_version;
- uint32_t pci_vendor_id;
- uint32_t pci_device_id;
-
uint8_t uuid[VK_UUID_SIZE];
struct wsi_device wsi_device;
uint32_t apiVersion;
int physicalDeviceCount;
struct radv_physical_device physicalDevice;
+
+ uint64_t debug_flags;
};
VkResult radv_init_wsi(struct radv_physical_device *physical_device);
int queue_count[RADV_MAX_QUEUE_FAMILIES];
struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES];
- bool allow_fast_clears;
- bool allow_dcc;
- bool shader_stats_dump;
+ uint64_t debug_flags;
/* MSAA sample locations.
* The first index is the sample index.
float sample_locations_4x[4][2];
float sample_locations_8x[8][2];
float sample_locations_16x[16][2];
+
+ struct radeon_winsys_bo *trace_bo;
+ uint32_t *trace_id_ptr;
};
struct radv_device_memory {
unsigned active_occlusion_queries;
float offset_scale;
uint32_t descriptors_dirty;
+ uint32_t trace_id;
};
struct radv_cmd_pool {
void radv_fill_buffer(struct radv_cmd_buffer *cmd_buffer,
struct radeon_winsys_bo *bo,
uint64_t offset, uint64_t size, uint32_t value);
+void radv_cmd_buffer_trace_emit(struct radv_cmd_buffer *cmd_buffer);
/*
* Takes x,y,z as exact numbers of invocations, instead of blocks.
VkImageLayout layout);
bool radv_layout_can_expclear(const struct radv_image *image,
VkImageLayout layout);
-bool radv_layout_has_cmask(const struct radv_image *image,
- VkImageLayout layout,
- unsigned queue_mask);
+bool radv_layout_can_fast_clear(const struct radv_image *image,
+ VkImageLayout layout,
+ unsigned queue_mask);
unsigned radv_image_queue_family_mask(const struct radv_image *image, int family);