vulkan: Add new cast macros for VkIcd types

[mesa.git] / src / amd / vulkan / radv_private.h

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index e9f0132aaaf148d7c97647ed017e4607d739a8e4..ebda49dc5bec8c99f9d090acd570ebd7147625a2 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -100,6 +100,18 @@ enum radv_mem_type {
        RADV_MEM_TYPE_COUNT
 };
 
+
+enum {
+       RADV_DEBUG_FAST_CLEARS       =   0x1,
+       RADV_DEBUG_NO_DCC            =   0x2,
+       RADV_DEBUG_DUMP_SHADERS      =   0x4,
+       RADV_DEBUG_NO_CACHE          =   0x8,
+       RADV_DEBUG_DUMP_SHADER_STATS =  0x10,
+       RADV_DEBUG_NO_HIZ            =  0x20,
+       RADV_DEBUG_NO_COMPUTE_QUEUE  =  0x40,
+       RADV_DEBUG_UNSAFE_MATH       =  0x80,
+};
+
 #define radv_noreturn __attribute__((__noreturn__))
 #define radv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
 
@@ -263,14 +275,8 @@ struct radv_physical_device {
 
        struct radeon_winsys *ws;
        struct radeon_info rad_info;
-       uint32_t                                    chipset_id;
        char                                        path[20];
        const char *                                name;
-       uint64_t                                    aperture_size;
-       int                                         cmd_parser_version;
-       uint32_t                    pci_vendor_id;
-       uint32_t                    pci_device_id;
-
        uint8_t                                     uuid[VK_UUID_SIZE];
 
        struct wsi_device                       wsi_device;
@@ -284,6 +290,8 @@ struct radv_instance {
        uint32_t                                    apiVersion;
        int                                         physicalDeviceCount;
        struct radv_physical_device                  physicalDevice;
+
+       uint64_t debug_flags;
 };
 
 VkResult radv_init_wsi(struct radv_physical_device *physical_device);
@@ -402,6 +410,11 @@ struct radv_meta_state {
                VkDescriptorSetLayout                     img_ds_layout;
                VkPipeline pipeline;
        } itoi;
+       struct {
+               VkPipelineLayout                          img_p_layout;
+               VkDescriptorSetLayout                     img_ds_layout;
+               VkPipeline pipeline;
+       } cleari;
 
        struct {
                VkPipeline                                pipeline;
@@ -468,11 +481,9 @@ struct radv_device {
 
        struct radv_queue *queues[RADV_MAX_QUEUE_FAMILIES];
        int queue_count[RADV_MAX_QUEUE_FAMILIES];
-       struct radeon_winsys_cs *empty_cs;
+       struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES];
 
-       bool allow_fast_clears;
-       bool allow_dcc;
-       bool shader_stats_dump;
+       uint64_t debug_flags;
 
        /* MSAA sample locations.
         * The first index is the sample index.
@@ -482,6 +493,9 @@ struct radv_device {
        float sample_locations_4x[4][2];
        float sample_locations_8x[8][2];
        float sample_locations_16x[16][2];
+
+       struct radeon_winsys_bo                      *trace_bo;
+       uint32_t                                     *trace_id_ptr;
 };
 
 struct radv_device_memory {
@@ -672,6 +686,7 @@ struct radv_cmd_state {
        unsigned                                     active_occlusion_queries;
        float                                        offset_scale;
        uint32_t                                      descriptors_dirty;
+       uint32_t                                      trace_id;
 };
 
 struct radv_cmd_pool {
@@ -715,6 +730,8 @@ struct radv_image;
 
 bool radv_cmd_buffer_uses_mec(struct radv_cmd_buffer *cmd_buffer);
 
+void si_init_compute(struct radv_physical_device *physical_device,
+                    struct radv_cmd_buffer *cmd_buffer);
 void si_init_config(struct radv_physical_device *physical_device,
                    struct radv_cmd_buffer *cmd_buffer);
 void si_write_viewport(struct radeon_winsys_cs *cs, int first_vp,
@@ -764,6 +781,7 @@ void radv_set_color_clear_regs(struct radv_cmd_buffer *cmd_buffer,
 void radv_fill_buffer(struct radv_cmd_buffer *cmd_buffer,
                      struct radeon_winsys_bo *bo,
                      uint64_t offset, uint64_t size, uint32_t value);
+void radv_cmd_buffer_trace_emit(struct radv_cmd_buffer *cmd_buffer);
 
 /*
  * Takes x,y,z as exact numbers of invocations, instead of blocks.
@@ -999,6 +1017,9 @@ struct radv_image {
        VkDeviceSize size;
        uint32_t alignment;
 
+       bool exclusive;
+       unsigned queue_family_mask;
+
        /* Set when bound */
        struct radeon_winsys_bo *bo;
        VkDeviceSize offset;
@@ -1019,8 +1040,13 @@ bool radv_layout_is_htile_compressed(const struct radv_image *image,
                                      VkImageLayout layout);
 bool radv_layout_can_expclear(const struct radv_image *image,
                               VkImageLayout layout);
-bool radv_layout_has_cmask(const struct radv_image *image,
-                          VkImageLayout layout);
+bool radv_layout_can_fast_clear(const struct radv_image *image,
+                               VkImageLayout layout,
+                               unsigned queue_mask);
+
+
+unsigned radv_image_queue_family_mask(const struct radv_image *image, int family);
+
 static inline uint32_t
 radv_get_layerCount(const struct radv_image *image,
                    const VkImageSubresourceRange *range)