radv: set correct INDEX_TYPE for indexed indirect draws on GFX9

[mesa.git] / src / amd / vulkan / radv_query.c

diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
index 4f79db4a93b6af947e2b493ddd8f2f06fa8f671a..06045d6b41bfa9e542fa0018b44102eb63e6c0f6 100644 (file)
--- a/src/amd/vulkan/radv_query.c
+++ b/src/amd/vulkan/radv_query.c
@@ -519,8 +519,6 @@ VkResult radv_device_init_meta_query_state(struct radv_device *device)
        struct radv_shader_module occlusion_cs = { .nir = NULL };
        struct radv_shader_module pipeline_statistics_cs = { .nir = NULL };
 
-       zero(device->meta_state.query);
-
        occlusion_cs.nir = build_occlusion_query_shader(device);
        pipeline_statistics_cs.nir = build_pipeline_statistics_query_shader(device);
 
@@ -651,9 +649,12 @@ static void radv_query_shader(struct radv_cmd_buffer *cmd_buffer,
                               uint32_t pipeline_stats_mask, uint32_t avail_offset)
 {
        struct radv_device *device = cmd_buffer->device;
-       struct radv_meta_saved_compute_state saved_state;
+       struct radv_meta_saved_state saved_state;
 
-       radv_meta_save_compute(&saved_state, cmd_buffer, 4);
+       radv_meta_save(&saved_state, cmd_buffer,
+                      RADV_META_SAVE_COMPUTE_PIPELINE |
+                      RADV_META_SAVE_CONSTANTS |
+                      RADV_META_SAVE_DESCRIPTORS);
 
        struct radv_buffer dst_buffer = {
                .bo = dst_bo,
@@ -737,7 +738,7 @@ static void radv_query_shader(struct radv_cmd_buffer *cmd_buffer,
                                        RADV_CMD_FLAG_INV_VMEM_L1 |
                                        RADV_CMD_FLAG_CS_PARTIAL_FLUSH;
 
-       radv_meta_restore_compute(&saved_state, cmd_buffer, 4);
+       radv_meta_restore(&saved_state, cmd_buffer);
 }
 
 VkResult radv_CreateQueryPool(
@@ -1152,7 +1153,7 @@ void radv_CmdEndQuery(
                                           false,
                                           cmd_buffer->device->physical_device->rad_info.chip_class,
                                           false,
-                                          EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0,
+                                          V_028A90_BOTTOM_OF_PIPE_TS, 0,
                                           1, avail_va, 0, 1);
                break;
        default: