tree-wide: replace MAYBE_UNUSED with ASSERTED

[mesa.git] / src / amd / vulkan / radv_query.c

diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
index 3add078e978cbee04adc816cce0ea86e54cfc54a..1da8100b3a165c344859337322194502b28a08c2 100644 (file)
--- a/src/amd/vulkan/radv_query.c
+++ b/src/amd/vulkan/radv_query.c
@@ -1129,7 +1129,7 @@ VkResult radv_GetQueryPoolResults(
                        if (flags & VK_QUERY_RESULT_WAIT_BIT) {
                                while (*(volatile uint64_t *)src == TIMESTAMP_NOT_READY)
                                        ;
-                               available = *(uint64_t *)src != TIMESTAMP_NOT_READY;
+                               available = true;
                        }
 
                        if (!available && !(flags & VK_QUERY_RESULT_PARTIAL_BIT))
@@ -1371,7 +1371,7 @@ void radv_CmdCopyQueryPoolResults(
                        unsigned query = firstQuery + i;
                        uint64_t local_src_va = va  + query * pool->stride;
 
-                       MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 19);
+                       ASSERTED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 19);
 
 
                        if (flags & VK_QUERY_RESULT_WAIT_BIT) {
@@ -1745,7 +1745,7 @@ void radv_CmdWriteTimestamp(
        if (cmd_buffer->state.subpass && cmd_buffer->state.subpass->view_mask)
                num_queries = util_bitcount(cmd_buffer->state.subpass->view_mask);
 
-       MAYBE_UNUSED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 28 * num_queries);
+       ASSERTED unsigned cdw_max = radeon_check_space(cmd_buffer->device->ws, cs, 28 * num_queries);
 
        for (unsigned i = 0; i < num_queries; i++) {
                switch(pipelineStage) {