radv/gfx10: enable vertex shaders without export parameters

[mesa.git] / src / amd / vulkan / radv_radeon_winsys.h

diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h
index e9d541ab150e52d72937bc36a2efa61ee2739ae2..38d95624c30380a8a1708517f0a8049b7eb9daa5 100644 (file)
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -58,6 +58,7 @@ enum radeon_bo_flag { /* bitfield */
        RADEON_FLAG_NO_INTERPROCESS_SHARING = (1 << 6),
        RADEON_FLAG_READ_ONLY =     (1 << 7),
        RADEON_FLAG_32BIT =         (1 << 8),
+       RADEON_FLAG_PREFER_LOCAL_BO = (1 << 9),
 };
 
 enum radeon_bo_usage { /* bitfield */
@@ -84,6 +85,9 @@ enum radeon_ctx_priority {
 };
 
 enum radeon_value_id {
+       RADEON_ALLOCATED_VRAM,
+       RADEON_ALLOCATED_VRAM_VIS,
+       RADEON_ALLOCATED_GTT,
        RADEON_TIMESTAMP,
        RADEON_NUM_BYTES_MOVED,
        RADEON_NUM_EVICTIONS,
@@ -164,6 +168,7 @@ struct radeon_winsys_fence;
 struct radeon_winsys_bo {
        uint64_t va;
        bool is_local;
+       bool vram_cpu_access;
 };
 struct radv_winsys_sem_counts {
        uint32_t syncobj_count;
@@ -184,6 +189,27 @@ struct radv_winsys_bo_list {
        unsigned count;
 };
 
+/* Kernel effectively allows 0-31. This sets some priorities for fixed
+ * functionality buffers */
+enum {
+       RADV_BO_PRIORITY_APPLICATION_MAX = 28,
+
+       /* virtual buffers have 0 priority since the priority is not used. */
+       RADV_BO_PRIORITY_VIRTUAL = 0,
+
+       /* This should be considerably lower than most of the stuff below,
+        * but how much lower is hard to say since we don't know application
+        * assignments. Put it pretty high since it is GTT anyway. */
+       RADV_BO_PRIORITY_QUERY_POOL = 29,
+
+       RADV_BO_PRIORITY_DESCRIPTOR = 30,
+       RADV_BO_PRIORITY_UPLOAD_BUFFER = 30,
+       RADV_BO_PRIORITY_FENCE = 30,
+       RADV_BO_PRIORITY_SHADER = 31,
+       RADV_BO_PRIORITY_SCRATCH = 31,
+       RADV_BO_PRIORITY_CS = 31,
+};
+
 struct radeon_winsys {
        void (*destroy)(struct radeon_winsys *ws);
 
@@ -202,17 +228,20 @@ struct radeon_winsys {
                                                  uint64_t size,
                                                  unsigned alignment,
                                                  enum radeon_bo_domain domain,
-                                                 enum radeon_bo_flag flags);
+                                                 enum radeon_bo_flag flags,
+                                                 unsigned priority);
 
        void (*buffer_destroy)(struct radeon_winsys_bo *bo);
        void *(*buffer_map)(struct radeon_winsys_bo *bo);
 
        struct radeon_winsys_bo *(*buffer_from_ptr)(struct radeon_winsys *ws,
                                                    void *pointer,
-                                                   uint64_t size);
+                                                   uint64_t size,
+                                                   unsigned priority);
 
        struct radeon_winsys_bo *(*buffer_from_fd)(struct radeon_winsys *ws,
                                                   int fd,
+                                                  unsigned priority,
                                                   unsigned *stride, unsigned *offset);
 
        bool (*buffer_get_fd)(struct radeon_winsys *ws,
@@ -272,6 +301,9 @@ struct radeon_winsys {
 
        struct radeon_winsys_fence *(*create_fence)();
        void (*destroy_fence)(struct radeon_winsys_fence *fence);
+       void (*reset_fence)(struct radeon_winsys_fence *fence);
+       void (*signal_fence)(struct radeon_winsys_fence *fence);
+       bool (*is_fence_waitable)(struct radeon_winsys_fence *fence);
        bool (*fence_wait)(struct radeon_winsys *ws,
                           struct radeon_winsys_fence *fence,
                           bool absolute,