radv/gfx10: Only set HW edge flags with gs & tess disabled.

[mesa.git] / src / amd / vulkan / radv_shader_info.c

diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c
index e771ad79878255158f37a903e19f4015ff4005ee..d813c33e1c8947bc2450c8929b2ed652f6e5a7e6 100644 (file)
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -224,7 +224,7 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
                      struct radv_shader_info *info)
 {
        switch (instr->intrinsic) {
-       case nir_intrinsic_interp_deref_at_sample:
+       case nir_intrinsic_load_barycentric_at_sample:
                info->ps.needs_sample_positions = true;
                break;
        case nir_intrinsic_load_draw_id:
@@ -265,6 +265,10 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
                if (nir->info.stage == MESA_SHADER_FRAGMENT)
                        info->ps.layer_input = true;
                break;
+       case nir_intrinsic_load_layer_id:
+               if (nir->info.stage == MESA_SHADER_FRAGMENT)
+                       info->ps.layer_input = true;
+               break;
        case nir_intrinsic_load_invocation_id:
                info->uses_invocation_id = true;
                break;
@@ -289,14 +293,6 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
        case nir_intrinsic_image_deref_atomic_comp_swap:
        case nir_intrinsic_image_deref_size: {
                nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
-               const struct glsl_type *type = glsl_without_array(var->type);
-
-               enum glsl_sampler_dim dim = glsl_get_sampler_dim(type);
-               if (dim == GLSL_SAMPLER_DIM_SUBPASS ||
-                   dim == GLSL_SAMPLER_DIM_SUBPASS_MS) {
-                       info->ps.layer_input = true;
-                       info->ps.uses_input_attachments = true;
-               }
                mark_sampler_desc(var, info);
 
                if (instr->intrinsic == nir_intrinsic_image_deref_store ||
@@ -376,12 +372,21 @@ gather_info_block(const nir_shader *nir, const nir_block *block,
 
 static void
 gather_info_input_decl_vs(const nir_shader *nir, const nir_variable *var,
-                         struct radv_shader_info *info)
+                         struct radv_shader_info *info,
+                         const struct radv_nir_compiler_options *options)
 {
+       unsigned attrib_count = glsl_count_attribute_slots(var->type, true);
        int idx = var->data.location;
 
        if (idx >= VERT_ATTRIB_GENERIC0 && idx <= VERT_ATTRIB_GENERIC15)
                info->vs.has_vertex_buffers = true;
+
+       for (unsigned i = 0; i < attrib_count; ++i) {
+               unsigned attrib_index = var->data.location + i - VERT_ATTRIB_GENERIC0;
+
+               if (options->key.vs.instance_rate_inputs & (1u << attrib_index))
+                       info->vs.needs_instance_id = true;
+       }
 }
 
 static void
@@ -418,11 +423,12 @@ gather_info_input_decl_ps(const nir_shader *nir, const nir_variable *var,
 
 static void
 gather_info_input_decl(const nir_shader *nir, const nir_variable *var,
-                      struct radv_shader_info *info)
+                      struct radv_shader_info *info,
+                      const struct radv_nir_compiler_options *options)
 {
        switch (nir->info.stage) {
        case MESA_SHADER_VERTEX:
-               gather_info_input_decl_vs(nir, var, info);
+               gather_info_input_decl_vs(nir, var, info, options);
                break;
        case MESA_SHADER_FRAGMENT:
                gather_info_input_decl_ps(nir, var, info);
@@ -490,7 +496,7 @@ gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
                gather_info_output_decl_ps(nir, var, info);
                break;
        case MESA_SHADER_VERTEX:
-               if (options->key.vs.as_ls)
+               if (options->key.vs.out.as_ls)
                        gather_info_output_decl_ls(nir, var, info);
                break;
        case MESA_SHADER_GEOMETRY:
@@ -557,7 +563,7 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
        }
 
        nir_foreach_variable(variable, &nir->inputs)
-               gather_info_input_decl(nir, variable, info);
+               gather_info_input_decl(nir, variable, info, options);
 
        nir_foreach_block(block, func->impl) {
                gather_info_block(nir, block, info);