#
# Authors: Steve Reinhardt
-import os.path
+import sys
-# Import build environment variable from SConstruct.
-Import('env')
-
-# Right now there are no source files immediately in this directory
-sources = []
+Import('*')
#################################################################
#
# List of headers to generate
isa_switch_hdrs = Split('''
- arguments.hh
- constants.hh
- faults.hh
- isa_traits.hh
- process.hh
- regfile.hh
- stacktrace.hh
- tlb.hh
- types.hh
- utility.hh
- vtophys.hh
+ arguments.hh
+ faults.hh
+ interrupts.hh
+ isa_traits.hh
+ kernel_stats.hh
+ locked_mem.hh
+ microcode_rom.hh
+ mmaped_ipr.hh
+ process.hh
+ predecoder.hh
+ regfile.hh
+ remote_gdb.hh
+ stacktrace.hh
+ syscallreturn.hh
+ tlb.hh
+ types.hh
+ utility.hh
+ vtophys.hh
''')
-# Generate the header. target[0] is the full path of the output
-# header to generate. 'source' is a dummy variable, since we get the
-# list of ISAs from env['ALL_ISA_LIST'].
-def gen_switch_hdr(target, source, env):
- fname = str(target[0])
- basename = os.path.basename(fname)
- f = open(fname, 'w')
- f.write('#include "arch/isa_specific.hh"\n')
- cond = '#if'
- for isa in env['ALL_ISA_LIST']:
- f.write('%s THE_ISA == %s_ISA\n#include "arch/%s/%s"\n'
- % (cond, isa.upper(), isa, basename))
- cond = '#elif'
- f.write('#else\n#error "THE_ISA not set"\n#endif\n')
- f.close()
- return 0
-
-# String to print when generating header
-def gen_switch_hdr_string(target, source, env):
- return "Generating ISA switch header " + str(target[0])
-
-# Build SCons Action object. 'varlist' specifies env vars that this
-# action depends on; when env['ALL_ISA_LIST'] changes these actions
-# should get re-executed.
-switch_hdr_action = Action(gen_switch_hdr, gen_switch_hdr_string,
- varlist=['ALL_ISA_LIST'])
-
-# Instantiate actions for each header
-for hdr in isa_switch_hdrs:
- env.Command(hdr, [], switch_hdr_action)
+# Set up this directory to support switching headers
+make_switching_dir('arch', isa_switch_hdrs, env)
#################################################################
#
# Several files are generated from the ISA description.
# We always get the basic decoder and header file.
-isa_desc_gen_files = Split('decoder.cc decoder.hh')
+isa_desc_gen_files = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ]
# We also get an execute file for each selected CPU model.
isa_desc_gen_files += [CpuModel.dict[cpu].filename
for cpu in env['CPU_MODELS']]
+# Also include the CheckerCPU as one of the models if it is being
+# enabled via command line.
+if env['USE_CHECKER']:
+ isa_desc_gen_files += [CpuModel.dict['CheckerCPU'].filename]
+
# The emitter patches up the sources & targets to include the
# autogenerated files as targets and isa parser itself as a source.
def isa_desc_emitter(target, source, env):
return (isa_desc_gen_files, [isa_parser, cpu_models_file] + source)
# Pieces are in place, so create the builder.
-isa_desc_builder = Builder(action='python2.4 $SOURCES $TARGET.dir $CPU_MODELS',
- emitter = isa_desc_emitter)
-
-env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
+python = sys.executable # use same Python binary used to run scons
-#
-# Now include other ISA-specific sources from the ISA subdirectories.
-#
+# Also include the CheckerCPU as one of the models if it is being
+# enabled via command line.
+if env['USE_CHECKER']:
+ isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS CheckerCPU',
+ emitter = isa_desc_emitter)
+else:
+ isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS',
+ emitter = isa_desc_emitter)
-isa = env['TARGET_ISA'] # someday this may be a list of ISAs
-
-# Let the target architecture define what additional sources it needs
-sources += SConscript(os.path.join(isa, 'SConscript'), exports = 'env')
+env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
-Return('sources')
+TraceFlag('IntRegs')
+TraceFlag('FloatRegs')
+TraceFlag('MiscRegs')
+CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ])
projects / gem5.git / blobdiff