sim: revert 6709bbcf564d

[gem5.git] / src / arch / alpha / AlphaTLB.py

diff --git a/src/arch/alpha/AlphaTLB.py b/src/arch/alpha/AlphaTLB.py
index 559516725afc1c38f5f484cea97dca73bf9e8446..8031c719f6c104e6b5352eec50ac0450e7f0f353 100644 (file)
--- a/src/arch/alpha/AlphaTLB.py
+++ b/src/arch/alpha/AlphaTLB.py
@@ -28,15 +28,17 @@
 
 from m5.SimObject import SimObject
 from m5.params import *
-class AlphaTLB(SimObject):
+
+from BaseTLB import BaseTLB
+
+class AlphaTLB(BaseTLB):
     type = 'AlphaTLB'
-    abstract = True
+    cxx_class = 'AlphaISA::TLB'
+    cxx_header = "arch/alpha/tlb.hh"
     size = Param.Int("TLB size")
 
 class AlphaDTB(AlphaTLB):
-    type = 'AlphaDTB'
     size = 64
 
 class AlphaITB(AlphaTLB):
-    type = 'AlphaITB'
     size = 48