X86: Get rid of the unused getAllocator on the python base microop class.

[gem5.git] / src / arch / alpha / pagetable.hh

diff --git a/src/arch/alpha/pagetable.hh b/src/arch/alpha/pagetable.hh
index c7e1c892323cae6d8c802c3712e918cbade4f6ee..59df93befe4c611bad3f430d926348805093c309 100644 (file)
--- a/src/arch/alpha/pagetable.hh
+++ b/src/arch/alpha/pagetable.hh
@@ -38,74 +38,109 @@
 
 namespace AlphaISA {
 
-    struct VAddr
+struct VAddr
+{
+    static const int ImplBits = 43;
+    static const Addr ImplMask = (ULL(1) << ImplBits) - 1;
+    static const Addr UnImplMask = ~ImplMask;
+
+    Addr addr;
+
+    VAddr(Addr a) : addr(a) {}
+    operator Addr() const { return addr; }
+    const VAddr &operator=(Addr a) { addr = a; return *this; }
+
+    Addr vpn() const { return (addr & ImplMask) >> PageShift; }
+    Addr page() const { return addr & PageMask; }
+    Addr offset() const { return addr & PageOffset; }
+
+    Addr level3() const
+    { return PteAddr(addr >> PageShift); }
+    Addr level2() const
+    { return PteAddr(addr >> (NPtePageShift + PageShift)); }
+    Addr level1() const
+    { return PteAddr(addr >> (2 * NPtePageShift + PageShift)); }
+};
+
+struct PageTableEntry
+{
+    PageTableEntry(uint64_t e) : entry(e) {}
+    uint64_t entry;
+    operator uint64_t() const { return entry; }
+    const PageTableEntry &operator=(uint64_t e) { entry = e; return *this; }
+    const PageTableEntry &operator=(const PageTableEntry &e)
+    { entry = e.entry; return *this; }
+
+    Addr _pfn()  const { return (entry >> 32) & 0xffffffff; }
+    Addr _sw()   const { return (entry >> 16) & 0xffff; }
+    int  _rsv0() const { return (entry >> 14) & 0x3; }
+    bool _uwe()  const { return (entry >> 13) & 0x1; }
+    bool _kwe()  const { return (entry >> 12) & 0x1; }
+    int  _rsv1() const { return (entry >> 10) & 0x3; }
+    bool _ure()  const { return (entry >>  9) & 0x1; }
+    bool _kre()  const { return (entry >>  8) & 0x1; }
+    bool _nomb() const { return (entry >>  7) & 0x1; }
+    int  _gh()   const { return (entry >>  5) & 0x3; }
+    bool _asm_()  const { return (entry >>  4) & 0x1; }
+    bool _foe()  const { return (entry >>  3) & 0x1; }
+    bool _fow()  const { return (entry >>  2) & 0x1; }
+    bool _for()  const { return (entry >>  1) & 0x1; }
+    bool valid() const { return (entry >>  0) & 0x1; }
+
+    Addr paddr() const { return _pfn() << PageShift; }
+};
+
+// ITB/DTB table entry
+struct TlbEntry
+{
+    Addr tag;               // virtual page number tag
+    Addr ppn;               // physical page number
+    uint8_t xre;            // read permissions - VMEM_PERM_* mask
+    uint8_t xwe;            // write permissions - VMEM_PERM_* mask
+    uint8_t asn;            // address space number
+    bool asma;              // address space match
+    bool fonr;              // fault on read
+    bool fonw;              // fault on write
+    bool valid;             // valid page table entry
+
+
+    //Construct an entry that maps to physical address addr.
+    TlbEntry(Addr _asn, Addr _vaddr, Addr _paddr)
     {
-        static const int ImplBits = 43;
-        static const Addr ImplMask = (ULL(1) << ImplBits) - 1;
-        static const Addr UnImplMask = ~ImplMask;
-
-        VAddr(Addr a) : addr(a) {}
-        Addr addr;
-        operator Addr() const { return addr; }
-        const VAddr &operator=(Addr a) { addr = a; return *this; }
-
-        Addr vpn() const { return (addr & ImplMask) >> PageShift; }
-        Addr page() const { return addr & PageMask; }
-        Addr offset() const { return addr & PageOffset; }
-
-        Addr level3() const
-        { return AlphaISA::PteAddr(addr >> PageShift); }
-        Addr level2() const
-        { return AlphaISA::PteAddr(addr >> NPtePageShift + PageShift); }
-        Addr level1() const
-        { return AlphaISA::PteAddr(addr >> 2 * NPtePageShift + PageShift); }
-    };
-
-    struct PageTableEntry
+        VAddr vaddr(_vaddr);
+        VAddr paddr(_paddr);
+        tag = vaddr.vpn();
+        ppn = paddr.vpn();
+        xre = 15;
+        xwe = 15;
+        asn = _asn;
+        asma = false;
+        fonr = false;
+        fonw = false;
+        valid = true;
+    }
+
+    TlbEntry()
+    {}
+
+    void
+    updateVaddr(Addr new_vaddr)
     {
-        PageTableEntry(uint64_t e) : entry(e) {}
-        uint64_t entry;
-        operator uint64_t() const { return entry; }
-        const PageTableEntry &operator=(uint64_t e) { entry = e; return *this; }
-        const PageTableEntry &operator=(const PageTableEntry &e)
-        { entry = e.entry; return *this; }
-
-        Addr _pfn()  const { return (entry >> 32) & 0xffffffff; }
-        Addr _sw()   const { return (entry >> 16) & 0xffff; }
-        int  _rsv0() const { return (entry >> 14) & 0x3; }
-        bool _uwe()  const { return (entry >> 13) & 0x1; }
-        bool _kwe()  const { return (entry >> 12) & 0x1; }
-        int  _rsv1() const { return (entry >> 10) & 0x3; }
-        bool _ure()  const { return (entry >>  9) & 0x1; }
-        bool _kre()  const { return (entry >>  8) & 0x1; }
-        bool _nomb() const { return (entry >>  7) & 0x1; }
-        int  _gh()   const { return (entry >>  5) & 0x3; }
-        bool _asm_()  const { return (entry >>  4) & 0x1; }
-        bool _foe()  const { return (entry >>  3) & 0x1; }
-        bool _fow()  const { return (entry >>  2) & 0x1; }
-        bool _for()  const { return (entry >>  1) & 0x1; }
-        bool valid() const { return (entry >>  0) & 0x1; }
-
-        Addr paddr() const { return _pfn() << PageShift; }
-    };
-
-    // ITB/DTB page table entry
-    struct PTE
+        VAddr vaddr(new_vaddr);
+        tag = vaddr.vpn();
+    }
+
+    Addr
+    pageStart()
     {
-        Addr tag;                      // virtual page number tag
-        Addr ppn;                      // physical page number
-        uint8_t xre;           // read permissions - VMEM_PERM_* mask
-        uint8_t xwe;           // write permissions - VMEM_PERM_* mask
-        uint8_t asn;           // address space number
-        bool asma;                     // address space match
-        bool fonr;                     // fault on read
-        bool fonw;                     // fault on write
-        bool valid;                    // valid page table entry
-
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
-    };
+        return ppn << PageShift;
+    }
 
+    void serialize(std::ostream &os);
+    void unserialize(Checkpoint *cp, const std::string &section);
 };
+
+} // namespace AlphaISA
+
 #endif // __ARCH_ALPHA_PAGETABLE_H__