cpt: update some comments in the checkpoint migration script

[gem5.git] / src / arch / alpha / utility.cc

diff --git a/src/arch/alpha/utility.cc b/src/arch/alpha/utility.cc
index 763da0d4f58d8f9bff23c290b4b85288e03c7479..32fc0b1417feb04470b19e961a1856c172258115 100644 (file)
--- a/src/arch/alpha/utility.cc
+++ b/src/arch/alpha/utility.cc
@@ -30,18 +30,20 @@
  */
 
 #include "arch/alpha/utility.hh"
-
-#if FULL_SYSTEM
 #include "arch/alpha/vtophys.hh"
-#include "mem/vport.hh"
-#endif
+#include "mem/fs_translating_port_proxy.hh"
+#include "sim/full_system.hh"
 
 namespace AlphaISA {
 
 uint64_t
-getArgument(ThreadContext *tc, int number, bool fp)
+getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
 {
-#if FULL_SYSTEM
+    if (!FullSystem) {
+        panic("getArgument() is Full system only\n");
+        M5_DUMMY_RETURN;
+    }
+
     const int NumArgumentRegs = 6;
     if (number < NumArgumentRegs) {
         if (fp)
@@ -50,16 +52,55 @@ getArgument(ThreadContext *tc, int number, bool fp)
             return tc->readIntReg(16 + number);
     } else {
         Addr sp = tc->readIntReg(StackPointerReg);
-        VirtualPort *vp = tc->getVirtPort();
-        uint64_t arg = vp->read<uint64_t>(sp +
-                           (number-NumArgumentRegs) * sizeof(uint64_t));
+        FSTranslatingPortProxy &vp = tc->getVirtProxy();
+        uint64_t arg = vp.read<uint64_t>(sp +
+                                         (number-NumArgumentRegs) *
+                                         sizeof(uint64_t));
         return arg;
     }
-#else
-    panic("getArgument() is Full system only\n");
-    M5_DUMMY_RETURN;
-#endif
 }
 
+void
+copyRegs(ThreadContext *src, ThreadContext *dest)
+{
+    // First loop through the integer registers.
+    for (int i = 0; i < NumIntRegs; ++i)
+        dest->setIntReg(i, src->readIntReg(i));
+
+    // Then loop through the floating point registers.
+    for (int i = 0; i < NumFloatRegs; ++i)
+        dest->setFloatRegBits(i, src->readFloatRegBits(i));
+
+    // Copy misc. registers
+    copyMiscRegs(src, dest);
+
+    // Lastly copy PC/NPC
+    dest->pcState(src->pcState());
+}
+
+void
+copyMiscRegs(ThreadContext *src, ThreadContext *dest)
+{
+    dest->setMiscRegNoEffect(MISCREG_FPCR,
+        src->readMiscRegNoEffect(MISCREG_FPCR));
+    dest->setMiscRegNoEffect(MISCREG_UNIQ,
+        src->readMiscRegNoEffect(MISCREG_UNIQ));
+    dest->setMiscRegNoEffect(MISCREG_LOCKFLAG,
+        src->readMiscRegNoEffect(MISCREG_LOCKFLAG));
+    dest->setMiscRegNoEffect(MISCREG_LOCKADDR,
+        src->readMiscRegNoEffect(MISCREG_LOCKADDR));
+
+    copyIprs(src, dest);
+}
+
+void
+skipFunction(ThreadContext *tc)
+{
+    TheISA::PCState newPC = tc->pcState();
+    newPC.set(tc->readIntReg(ReturnAddressReg));
+    tc->pcState(newPC);
+}
+
+
 } // namespace AlphaISA