misc: Merged release-staging-v19.0.0.0 into develop

[gem5.git] / src / arch / arm / SConscript

diff --git a/src/arch/arm/SConscript b/src/arch/arm/SConscript
index 6ef445e10086c89e992ddcc6bd909d0e25233ecd..b4e9bba8e11e95184680d32e381f9c66ffd510b0 100644 (file)
--- a/src/arch/arm/SConscript
+++ b/src/arch/arm/SConscript
@@ -1,6 +1,6 @@
 # -*- mode:python -*-
 
-# Copyright (c) 2009, 2012-2013 ARM Limited
+# Copyright (c) 2009, 2012-2013, 2017-2018 ARM Limited
 # All rights reserved.
 #
 # The license below extends only to copyright in the software and shall
@@ -37,9 +37,6 @@
 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Stephen Hines
-#          Ali Saidi
 
 Import('*')
 
@@ -49,6 +46,7 @@ if env['TARGET_ISA'] == 'arm':
     Dir('isa/formats')
     Source('decoder.cc')
     Source('faults.cc')
+    Source('insts/branch.cc')
     Source('insts/branch64.cc')
     Source('insts/data64.cc')
     Source('insts/macromem.cc')
@@ -59,8 +57,11 @@ if env['TARGET_ISA'] == 'arm':
     Source('insts/pred_inst.cc')
     Source('insts/pseudo.cc')
     Source('insts/static_inst.cc')
+    Source('insts/sve.cc')
+    Source('insts/sve_mem.cc')
     Source('insts/vfp.cc')
     Source('insts/fplib.cc')
+    Source('insts/crypto.cc')
     Source('interrupts.cc')
     Source('isa.cc')
     Source('isa_device.cc')
@@ -72,8 +73,10 @@ if env['TARGET_ISA'] == 'arm':
     Source('freebsd/system.cc')
     Source('miscregs.cc')
     Source('nativetrace.cc')
+    Source('pauth_helpers.cc')
     Source('pmu.cc')
     Source('process.cc')
+    Source('qarma.cc')
     Source('remote_gdb.cc')
     Source('semihosting.cc')
     Source('stacktrace.cc')
@@ -103,3 +106,10 @@ if env['TARGET_ISA'] == 'arm':
 
     # Add files generated by the ISA description.
     ISADesc('isa/main.isa', decoder_splits=3, exec_splits=6)
+
+    GdbXml('arm/arm-with-neon.xml', 'gdb_xml_arm_target')
+    GdbXml('arm/arm-core.xml', 'gdb_xml_arm_core')
+    GdbXml('arm/arm-vfpv3.xml', 'gdb_xml_arm_vfpv3')
+    GdbXml('aarch64.xml', 'gdb_xml_aarch64_target')
+    GdbXml('aarch64-core.xml', 'gdb_xml_aarch64_core')
+    GdbXml('aarch64-fpu.xml', 'gdb_xml_aarch64_fpu')