ARM: Move the longer MemoryReg::printoffset function in mem.hh into the cc file.

[gem5.git] / src / arch / arm / insts / mem.cc

diff --git a/src/arch/arm/insts/mem.cc b/src/arch/arm/insts/mem.cc
index eb16e42d02018e5a8de8461b16f21233ece07759..3dde0aa35dbfb40c811ddd7bb31e0b7ea7bc9e12 100644 (file)
--- a/src/arch/arm/insts/mem.cc
+++ b/src/arch/arm/insts/mem.cc
@@ -48,6 +48,42 @@ using namespace std;
 namespace ArmISA
 {
 
+void
+MemoryReg::printOffset(std::ostream &os) const
+{
+    if (!add)
+        os << "-";
+    printReg(os, index);
+    if (shiftType != LSL || shiftAmt != 0) {
+        switch (shiftType) {
+          case LSL:
+            ccprintf(os, " LSL #%d", shiftAmt);
+            break;
+          case LSR:
+            if (shiftAmt == 0) {
+                ccprintf(os, " LSR #%d", 32);
+            } else {
+                ccprintf(os, " LSR #%d", shiftAmt);
+            }
+            break;
+          case ASR:
+            if (shiftAmt == 0) {
+                ccprintf(os, " ASR #%d", 32);
+            } else {
+                ccprintf(os, " ASR #%d", shiftAmt);
+            }
+            break;
+          case ROR:
+            if (shiftAmt == 0) {
+                ccprintf(os, " RRX");
+            } else {
+                ccprintf(os, " ROR #%d", shiftAmt);
+            }
+            break;
+        }
+    }
+}
+
 string
 Swap::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
@@ -110,7 +146,7 @@ SrsOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
         ss << "!";
     }
     ss << ", #";
-    switch (mode) {
+    switch (regMode) {
       case MODE_USER:
         ss << "user";
         break;