mem-cache: Add multiple eviction stats

[gem5.git] / src / arch / arm / isa_device.hh

diff --git a/src/arch/arm/isa_device.hh b/src/arch/arm/isa_device.hh
index edf43f1cb867d1b4ca727925ad55a99f206d79a1..60372de021f749b6b34bd3115cf4bdee5b3a37f6 100644 (file)
--- a/src/arch/arm/isa_device.hh
+++ b/src/arch/arm/isa_device.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014 ARM Limited
+ * Copyright (c) 2014, 2017 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -43,9 +43,13 @@
 #include "arch/arm/registers.hh"
 #include "base/compiler.hh"
 
+class ThreadContext;
+
 namespace ArmISA
 {
 
+class ISA;
+
 /**
  * Base class for devices that use the MiscReg interfaces.
  *
@@ -56,16 +60,19 @@ namespace ArmISA
 class BaseISADevice
 {
   public:
-    BaseISADevice() {}
+    BaseISADevice();
     virtual ~BaseISADevice() {}
 
+    virtual void setISA(ISA *isa);
+    virtual void setThreadContext(ThreadContext *tc) {}
+
     /**
      * Write to a system register belonging to this device.
      *
      * @param misc_reg Register number (see miscregs.hh)
      * @param val Value to store
      */
-    virtual void setMiscReg(int misc_reg, MiscReg val) = 0;
+    virtual void setMiscReg(int misc_reg, RegVal val) = 0;
 
     /**
      * Read a system register belonging to this device.
@@ -73,7 +80,10 @@ class BaseISADevice
      * @param misc_reg Register number (see miscregs.hh)
      * @return Register value.
      */
-    virtual MiscReg readMiscReg(int misc_reg) = 0;
+    virtual RegVal readMiscReg(int misc_reg) = 0;
+
+  protected:
+    ISA *isa;
 };
 
 /**
@@ -90,8 +100,8 @@ class DummyISADevice : public BaseISADevice
         : BaseISADevice() {}
     ~DummyISADevice() {}
 
-    void setMiscReg(int misc_reg, MiscReg val) M5_ATTR_OVERRIDE;
-    MiscReg readMiscReg(int misc_reg) M5_ATTR_OVERRIDE;
+    void setMiscReg(int misc_reg, RegVal val) override;
+    RegVal readMiscReg(int misc_reg) override;
 };
 
 }