Make commenting on close namespace brackets consistent.

[gem5.git] / src / arch / arm / isa_traits.hh

diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh
index 91c51c46b3726bdbea72795926dd568390afad53..b2989e4b3dd4935b42ee777e626355e7b151cf16 100644 (file)
--- a/src/arch/arm/isa_traits.hh
+++ b/src/arch/arm/isa_traits.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2010 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2003-2005 The Regents of The University of Michigan
  * Copyright (c) 2007-2008 The Florida State University
  * All rights reserved.
@@ -36,7 +48,7 @@
 #include "arch/arm/types.hh"
 #include "base/types.hh"
 
-namespace LittleEndianGuest {};
+namespace LittleEndianGuest {}
 
 #define TARGET_ARM
 
@@ -74,14 +86,6 @@ namespace ArmISA
     const Addr USegBase = ULL(0x0);
     const Addr USegEnd = ULL(0x7FFFFFFF);
 
-    // Kernel Segment 0 - Unmapped
-    const Addr KSeg0End = ULL(0x9FFFFFFF);
-    const Addr KSeg0Base =  ULL(0x80000000);
-    const Addr KSeg0Mask = ULL(0x1FFFFFFF);
-
-    // For loading... XXX This maybe could be USegEnd?? --ali
-    const Addr LoadAddrMask = ULL(0xffffffffff);
-
     const unsigned VABits = 32;
     const unsigned PABits = 32; // Is this correct?
     const Addr VAddrImplMask = (ULL(1) << VABits) - 1;
@@ -95,9 +99,10 @@ namespace ArmISA
     // return a no-op instruction... used for instruction fetch faults
     const ExtMachInst NoopMachInst = 0x00000000;
 
-    const int LogVMPageSize = 12;      // 4K bytes
+    const int LogVMPageSize = 12;       // 4K bytes
     const int VMPageSize = (1 << LogVMPageSize);
 
+    // Shouldn't this be 1 because of Thumb?! Dynamic? --Ali
     const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
 
     const int MachineBytes = 4;
@@ -106,7 +111,19 @@ namespace ArmISA
     const int ByteBytes = 1;
 
     const uint32_t HighVecs = 0xFFFF0000;
-};
+
+    // Memory accesses cannot be unaligned
+    const bool HasUnalignedMemAcc = true;
+
+    enum InterruptTypes
+    {
+        INT_RST,
+        INT_ABT,
+        INT_IRQ,
+        INT_FIQ,
+        NumInterruptTypes
+    };
+} // namespace ArmISA
 
 using namespace ArmISA;