#include "arch/arm/linux/linux.hh"
#include "arch/arm/linux/process.hh"
#include "arch/arm/isa_traits.hh"
-
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/linux.hh"
-
#include "sim/process.hh"
#include "sim/syscall_emul.hh"
#include "sim/system.hh"
strcpy(name->sysname, "Linux");
strcpy(name->nodename, "m5.eecs.umich.edu");
- strcpy(name->release, "2.6.29");
+ strcpy(name->release, "3.0.0");
strcpy(name->version, "#1 Mon Aug 18 11:32:15 EDT 2003");
strcpy(name->machine, "armv7l");
- name.copyOut(tc->getMemPort());
+ name.copyOut(tc->getMemProxy());
return 0;
}
/* 73 */ SyscallDesc("sigpending", unimplementedFunc),
/* 74 */ SyscallDesc("sethostname", ignoreFunc),
/* 75 */ SyscallDesc("setrlimit", ignoreFunc),
- /* 76 */ SyscallDesc("getrlimit", unimplementedFunc),
+ /* 76 */ SyscallDesc("getrlimit", getrlimitFunc<ArmLinux>),
/* 77 */ SyscallDesc("getrusage", getrusageFunc<ArmLinux>),
/* 78 */ SyscallDesc("gettimeofday", gettimeofdayFunc<ArmLinux>),
/* 79 */ SyscallDesc("settimeofday", unimplementedFunc),
int index = 0;
uint32_t tlsPtr = process->getSyscallArg(tc, index);
- tc->getMemPort()->writeBlob(ArmLinuxProcess::commPage + 0x0ff0,
+ tc->getMemProxy().writeBlob(ArmLinuxProcess::commPage + 0x0ff0,
(uint8_t *)&tlsPtr, sizeof(tlsPtr));
tc->setMiscReg(MISCREG_TPIDRURO,tlsPtr);
return 0;
}
void
-ArmLinuxProcess::startup()
+ArmLinuxProcess::initState()
{
- ArmLiveProcess::startup();
- pTable->allocate(commPage, PageBytes);
+ ArmLiveProcess::initState();
+ allocateMem(commPage, PageBytes);
ThreadContext *tc = system->getThreadContext(contextIds[0]);
uint8_t swiNeg1[] = {
// Fill this page with swi -1 so we'll no if we land in it somewhere.
for (Addr addr = 0; addr < PageBytes; addr += sizeof(swiNeg1)) {
- tc->getMemPort()->writeBlob(commPage + addr,
+ tc->getMemProxy().writeBlob(commPage + addr,
swiNeg1, sizeof(swiNeg1));
}
- // We don't have barriers, so just return.
- // @todo Add a barrrier in this code
uint8_t memory_barrier[] =
{
0x5f, 0xf0, 0x7f, 0xf5, // dmb
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemPort()->writeBlob(commPage + 0x0fa0, memory_barrier,
+ tc->getMemProxy().writeBlob(commPage + 0x0fa0, memory_barrier,
sizeof(memory_barrier));
- // This -should- be atomic, but I don't think all the support that we'd
- // need is implemented. There should also be memory barriers around it.
- // @todo replace this with ldrex/strex and dmb
uint8_t cmpxchg[] =
{
0x9f, 0x3f, 0x92, 0xe1, // ldrex r3, [r2]
0x5f, 0xf0, 0x7f, 0xf5, // dmb
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemPort()->writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg));
+ tc->getMemProxy().writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg));
uint8_t get_tls[] =
{
0x70, 0x0f, 0x1d, 0xee, // mrc p15, 0, r0, c13, c0, 3
0x0e, 0xf0, 0xa0, 0xe1 // return
};
- tc->getMemPort()->writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls));
+ tc->getMemProxy().writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls));
}
ArmISA::IntReg