sim-se: don't wake up SE futex syscalls on ARM events

[gem5.git] / src / arch / arm / locked_mem.hh

diff --git a/src/arch/arm/locked_mem.hh b/src/arch/arm/locked_mem.hh
index ad52da4fb5aac581b42c4e325b7a0c79e909958a..a01b838b46769c89f961c806322317b738af814e 100644 (file)
--- a/src/arch/arm/locked_mem.hh
+++ b/src/arch/arm/locked_mem.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2013,2017 ARM Limited
+ * Copyright (c) 2012-2013,2017, 2020 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -50,6 +50,7 @@
 
 #include "arch/arm/miscregs.hh"
 #include "arch/arm/isa_traits.hh"
+#include "arch/arm/utility.hh"
 #include "debug/LLSC.hh"
 #include "mem/packet.hh"
 #include "mem/request.hh"
@@ -80,8 +81,8 @@ handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask)
                 xc->getCpuPtr()->name());
         xc->setMiscReg(MISCREG_LOCKFLAG, false);
         // Implement ARMv8 WFE/SEV semantics
+        sendEvent(xc);
         xc->setMiscReg(MISCREG_SEV_MAILBOX, true);
-        xc->getCpuPtr()->wakeup(xc->threadId());
     }
 }
 
@@ -155,8 +156,8 @@ globalClearExclusive(XC *xc)
     DPRINTF(LLSC,"Clearing lock and signaling sev\n");
     xc->setMiscReg(MISCREG_LOCKFLAG, false);
     // Implement ARMv8 WFE/SEV semantics
+    sendEvent(xc);
     xc->setMiscReg(MISCREG_SEV_MAILBOX, true);
-    xc->getCpuPtr()->wakeup(xc->threadId());
 }
 
 } // namespace ArmISA