mem-cache: Add multiple eviction stats

[gem5.git] / src / arch / arm / nativetrace.cc

diff --git a/src/arch/arm/nativetrace.cc b/src/arch/arm/nativetrace.cc
index a8d01a0f2c4664abd43b2ed511d469f8f754a966..26bcb49699363c12e55692231b93e416597fb24f 100644 (file)
--- a/src/arch/arm/nativetrace.cc
+++ b/src/arch/arm/nativetrace.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2010 ARM Limited
+ * Copyright (c) 2010-2011, 2014, 2016-2017 ARM Limited
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -40,9 +40,10 @@
  * Authors: Gabe Black
  */
 
+#include "arch/arm/nativetrace.hh"
+
 #include "arch/arm/isa_traits.hh"
 #include "arch/arm/miscregs.hh"
-#include "arch/arm/nativetrace.hh"
 #include "cpu/thread_context.hh"
 #include "debug/ExecRegDelta.hh"
 #include "params/ArmNativeTrace.hh"
@@ -73,7 +74,7 @@ Trace::ArmNativeTrace::ThreadState::update(NativeTrace *parent)
 
     uint64_t diffVector;
     parent->read(&diffVector, sizeof(diffVector));
-    diffVector = ArmISA::gtoh(diffVector);
+    diffVector = letoh(diffVector);
 
     int changes = 0;
     for (int i = 0; i < STATE_NUMVALS; i++) {
@@ -91,7 +92,7 @@ Trace::ArmNativeTrace::ThreadState::update(NativeTrace *parent)
     int pos = 0;
     for (int i = 0; i < STATE_NUMVALS; i++) {
         if (changed[i]) {
-            newState[i] = ArmISA::gtoh(values[pos++]);
+            newState[i] = letoh(values[pos++]);
             changed[i] = (newState[i] != oldState[i]);
         }
     }
@@ -115,17 +116,23 @@ Trace::ArmNativeTrace::ThreadState::update(ThreadContext *tc)
     changed[STATE_PC] = (newState[STATE_PC] != oldState[STATE_PC]);
 
     //CPSR
-    newState[STATE_CPSR] = tc->readMiscReg(MISCREG_CPSR) |
-                           tc->readIntReg(INTREG_CONDCODES);
+    CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
+    cpsr.nz = tc->readCCReg(CCREG_NZ);
+    cpsr.c = tc->readCCReg(CCREG_C);
+    cpsr.v = tc->readCCReg(CCREG_V);
+    cpsr.ge = tc->readCCReg(CCREG_GE);
+
+    newState[STATE_CPSR] = cpsr;
     changed[STATE_CPSR] = (newState[STATE_CPSR] != oldState[STATE_CPSR]);
 
-    for (int i = 0; i < NumFloatArchRegs; i += 2) {
-        newState[STATE_F0 + (i >> 1)] =
-            static_cast<uint64_t>(tc->readFloatRegBits(i + 1)) << 32 |
-            tc->readFloatRegBits(i);
+    for (int i = 0; i < NumVecV7ArchRegs; i++) {
+        auto vec(tc->readVecReg(RegId(VecRegClass,i))
+            .as<uint64_t, MaxSveVecLenInDWords>());
+        newState[STATE_F0 + 2*i] = vec[0];
+        newState[STATE_F0 + 2*i + 1] = vec[1];
     }
     newState[STATE_FPSCR] = tc->readMiscRegNoEffect(MISCREG_FPSCR) |
-                            tc->readIntReg(INTREG_FPCONDCODES);
+                            tc->readCCReg(CCREG_FP);
 }
 
 void
@@ -151,18 +158,23 @@ Trace::ArmNativeTrace::check(NativeTraceRecord *record)
     // Regular int regs
     for (int i = 0; i < STATE_NUMVALS; i++) {
         if (nState.changed[i] || mState.changed[i]) {
-            const char *vergence = "  ";
             bool oldMatch = (mState.oldState[i] == nState.oldState[i]);
             bool newMatch = (mState.newState[i] == nState.newState[i]);
             if (oldMatch && newMatch) {
                 // The more things change, the more they stay the same.
                 continue;
-            } else if (oldMatch && !newMatch) {
+            }
+
+            errorFound = true;
+
+#ifndef NDEBUG
+            const char *vergence = "  ";
+            if (oldMatch && !newMatch) {
                 vergence = "<>";
             } else if (!oldMatch && newMatch) {
                 vergence = "><";
             }
-            errorFound = true;
+
             if (!nState.changed[i]) {
                 DPRINTF(ExecRegDelta, "%s [%5s] "\
                                       "Native:         %#010x         "\
@@ -185,6 +197,7 @@ Trace::ArmNativeTrace::check(NativeTraceRecord *record)
                                       nState.oldState[i], nState.newState[i],
                                       mState.oldState[i], mState.newState[i]);
             }
+#endif
         }
     }
     if (errorFound) {
@@ -215,4 +228,4 @@ Trace::ArmNativeTrace *
 ArmNativeTraceParams::create()
 {
     return new Trace::ArmNativeTrace(this);
-};
+}