Mem: Reclaim some request flags used by MIPS for alignment checking.
[gem5.git] / src / arch / arm / nativetrace.hh
index a347040fb1ce4c07679ebc929cdfe3b0132e4d61..7467e337826239040cfa0d577e9785e165ae117f 100644 (file)
 
 #include "base/types.hh"
 #include "cpu/nativetrace.hh"
+#include "params/ArmNativeTrace.hh"
 
 namespace Trace {
 
 class ArmNativeTrace : public NativeTrace
 {
   public:
-    ArmNativeTrace(const Params *p) : NativeTrace(p)
+    enum StateID {
+        STATE_R0,
+        STATE_R1,
+        STATE_R2,
+        STATE_R3,
+        STATE_R4,
+        STATE_R5,
+        STATE_R6,
+        STATE_R7,
+        STATE_R8,
+        STATE_R9,
+        STATE_R10,
+        STATE_R11,
+        STATE_FP = STATE_R11,
+        STATE_R12,
+        STATE_R13,
+        STATE_SP = STATE_R13,
+        STATE_R14,
+        STATE_LR = STATE_R14,
+        STATE_R15,
+        STATE_PC = STATE_R15,
+        STATE_CPSR,
+        STATE_NUMVALS
+    };
+
+  protected:
+    struct ThreadState {
+        bool changed[STATE_NUMVALS];
+        uint32_t state[2][STATE_NUMVALS];
+        uint32_t *newState;
+        uint32_t *oldState;
+        int current;
+        void update(NativeTrace *parent);
+        void update(ThreadContext *tc);
+
+        ThreadState()
+        {
+            for (int i = 0; i < STATE_NUMVALS; i++) {
+                changed[i] = false;
+                state[0][i] = state[1][i] = 0;
+                current = 0;
+                newState = state[0];
+                oldState = state[1];
+            }
+        }
+    };
+
+    ThreadState nState, mState;
+
+    bool stopOnPCError;
+
+  public:
+    typedef ArmNativeTraceParams Params;
+
+    const Params *
+    params() const
+    {
+        return dynamic_cast<const Params *>(_params);
+    }
+
+    ArmNativeTrace(const Params *p) :
+        NativeTrace(p), stopOnPCError(p->stop_on_pc_error)
     {}
 
     void check(NativeTraceRecord *record);